Highly selective doped oxide etchant

Abstract

Etch solutions for selectively etching doped oxide materials in the presence of silicon nitride, titanium nitride, and silicon materials, and methods utilizing the etch solutions, for example, in the construction of container capacitor constructions are provided. The etch solutions are formulated as a mixture of hydrofluoric acid and an organic acid having a dielectric constant less than water, optionally with an inorganic acid, and a pH of 1 or less.

1 . An etch solution comprising an about 5:1 to 20:1 (v/v) mixture of an organic acid:hydrofluoric acid, the organic acid having a dielectric constant of about 20 or less, the etch solution effective to etch a doped oxide material selectively relative to a silicon nitride material.  
   
   
       2 . The etch solution of  claim 1 , comprising an about 10:1 (v/v) mixture of the organic acid:hydrofluoric acid.  
   
   
       3 . The etch solution of  claim 1 , wherein the organic acid is selected from the group consisting of propionic acid and butyric acid.  
   
   
       4 . The etch solution of  claim 1 , wherein the etch solution has a pH of about 1 or less.  
   
   
       5 . An etch solution, comprising: hydrofluoric acid and an organic acid having a dielectric constant of about 20 or less, the etch solution effective to etch a doped oxide material relative to low temperature silicon nitride material at a selectivity of about 250-400:1.  
   
   
       6 . An etch solution, comprising: hydrofluoric acid and an organic acid having a dielectric constant of about 20 or less, the etch solution effective to etch a doped oxide material relative to high temperature silicon nitride material at a selectivity of about 1000-1500:1.  
   
   
       7 . An etch solution comprising an about 5:1:0-3 to 20:1:0-3 (v/v/v) mixture of an organic acid: hydrofluoric acid:inorganic acid, the organic acid having a dielectric constant of about 20 or less, the etch solution effective to etch a doped oxide material selectively relative to a silicon nitride material.  
   
   
       8 . The etch solution of  claim 7 , wherein the inorganic acid is selected from the group consisting of nitric acid, sulfuric acid, hydrochloric acid, and phosphoric acid.  
   
   
       9 . The etch solution of  claim 7 , having a selectivity to the doped oxide material relative to a low temperature silicon nitride material of about 250-400:1, and selectivity to the doped oxide material relative to a high temperature silicon nitride material of about 1000-1500:1.  
   
   
       10 . An etch solution comprising an about 5:1:≦3 to 20:1:≦3 (v/v/v) mixture of an organic acid: hydrofluoric acid:inorganic acid, the organic acid having a dielectric constant of about 20 or less, and the etch solution effective to etch a doped oxide material selectively relative to a silicon nitride material.  
   
   
       11 . An etch solution comprising an about 10:1:≦1.5 (v/v/v) mixture of an organic acid:hydrofluoric acid:inorganic acid, the organic acid having a dielectric constant of about 20 or less, and the etch solution effective to etch a doped oxide material selectively relative to a silicon nitride material.  
   
   
       12 . An etch solution comprising an about 5:1:0-3 to 20:1:0-3 (v/v/v) mixture of propionic acid: hydrofluoric acid:nitric acid, the etch solution effective to etch a doped oxide material selectively relative to a low temperature silicon nitride material at a selectivity of about 250-400:1, and to a high temperature silicon nitride material at a selectivity of about 1000-1500:1.  
   
   
       13 . A method of etching a doped oxide material on a substrate, comprising the step of: etching the doped oxide material selectively relative to a silicon nitride material exposed on the substrate by applying an etch solution comprising hydrofluoric acid and an organic acid having a dielectric constant of about 20 or less.  
   
   
       14 . The method of  claim 13 , wherein the organic acid has a dielectric constant of about 3 or less.  
   
   
       15 . The method of  claim 14 , wherein the organic acid is selected from the group consisting of propionic acid and butyric acid.  
   
   
       16 . A method of etching a doped oxide material on a substrate, comprising the step of: 
 selectively etching the doped oxide material relative to an exposed silicon nitride material on the substrate by applying an etch solution comprising a 5:1 to 20:1 (v/v) mixture of an organic acid:hydrofluoric acid, the organic acid having a dielectric constant of about 20 or less.    
   
   
       17 . A method of etching a doped oxide material on a substrate, comprising the step of: 
 applying an etch solution comprising a mixture of hydrofluoric acid and an organic acid to a substrate comprising the doped oxide material and an exposed low temperature silicon nitride material to etch the doped oxide material relative to the low temperature silicon nitride material at a selectivity of about 250-400:1, the organic acid having a dielectric constant of about 20 or less.    
   
   
       18 . The method of  claim 17 , wherein the low temperature silicon nitride comprises HCD silicon nitride.  
   
   
       19 . A method of etching a doped oxide material on a substrate, comprising the step of: 
 applying an etch solution comprising a mixture of hydrofluoric acid and an organic acid to a substrate comprising the doped oxide material and an exposed high temperature silicon nitride material to etch the doped oxide material relative to the high temperature silicon nitride material at a selectivity of about 1000-1500: 1, the organic acid having a dielectric constant of about 20 or less.    
   
   
       20 . The method of  claim 19 , wherein the high temperature silicon nitride comprises DCS silicon nitride.  
   
   
       21 . A method of etching a doped oxide material on a substrate, comprising the step of: 
 applying an etch solution comprising an about 5:1:≦3 to 20:1:≦3 (v/v/v) mixture of an organic acid:hydrofluoric acid:inorganic acid to a substrate comprising the doped oxide material and an exposed silicon nitride material to etch the doped oxide material selectively relative to the silicon nitride material and polysilicon material at less than about 10 Å/minute, the organic acid having a dielectric constant of about 20 or less.    
   
   
       22 . The method of  claim 21 , wherein the inorganic acid is selected from the group consisting of nitric acid, sulfuric acid, hydrochloric acid, and phosphoric acid.  
   
   
       23 . The method of  claim 21 , wherein the etch solution comprises an about 10:1:≦1.5 (v/v/v) mixture of the organic acid:hydrofluoric acid:inorganic acid.  
   
   
       24 . A method of forming a plurality of capacitor devices, comprising the steps of: 
 providing a construction comprising a doped oxide layer, and an overlying silicon nitride layer;    forming openings extending into the doped oxide layer;    forming a conductive container structure comprising a conductive material layer within the openings, the conductive container structure having an opening extending therein, an outer surface along the doped oxide layer, and a laterally opposed inner surface within the opening;    removing a portion of the silicon nitride layer to expose the doped oxide layer adjacent a segment of the outer surface of the conductive container structures, while retaining portions of the silicon nitride layer connecting adjacently positioned conductive container structures; and    removing a portion of the doped oxide layer selectively relative to the silicon nitride and the conductive material layer to expose the segment of the outer surface of the conductive container structures by applying an etch solution comprising an about 5:1 to 20:1 (v/v) mixture of an organic acid: hydrofluoric acid, the organic acid having a dielectric constant of about 20 or less.    
   
   
       25 . The method of  claim 24 , wherein the silicon nitride comprises a low temperature silicon nitride, and the etch solution etches the doped oxide material at an etch rate of about 20,000 Å/minute or greater, relative to the low temperature silicon nitride material at a selectivity of about 250-400:1.  
   
   
       26 . The method of  claim 24 , wherein the silicon nitride comprises a high temperature silicon nitride, and the etch solution etches the doped oxide material at an etch rate of about 20,000 Å/minute or greater, and relative to the high temperature silicon nitride material at a selectivity of about 1000-1500:1.  
   
   
       27 . The method of  claim 24 , wherein the doped oxide is selected from the group consisting of phosphosilicate glass, borophosphosilicate glass, and borosilicate glass.  
   
   
       28 . The method of  claim 24 , wherein the conductive material layer comprises titanium nitride.  
   
   
       29 . The method of  claim 24 , wherein the organic acid of the etch solution has a dielectric constant of about 3 or less.  
   
   
       30 . The method of  claim 24 , wherein the etch solution further comprises an inorganic acid up to a volume of about 3 within the mixture.  
   
   
       31 . The method of  claim 24 , wherein the etch solution further comprises an inorganic acid at a volume of about 1.5 or less.  
   
   
       32 . The method of  claim 31 , wherein the inorganic acid is selected from the group consisting of nitric acid, sulfuric acid, hydrochloric acid, and phosphoric acid.  
   
   
       33 . The method of  claim 24 , wherein the openings extend in an array comprising rows and columns, and the silicon nitride layer is patterned to extend between and connect pairs of the rows of the conductive structure array.  
   
   
       34 . The method of  claim 24 , further comprising the steps of: 
 forming a capacitor dielectric layer over the exposed inner and outer surfaces of the conductive container structures; and forming a second conductive material layer over the capacitor dielectric layer.    
   
   
       35 . A method of forming a plurality of capacitor devices, comprising the steps of: 
 providing a construction comprising a doped oxide layer, and an overlying silicon nitride layer;    forming openings extending into the doped oxide layer;    forming a conductive container structure comprising a conductive material layer within the openings, the conductive container structure having an opening extending therein, an outer surface along the doped oxide layer, and a laterally opposed inner surface within the opening;    forming a layer of polysilicon over the silicon nitride layer and the conductive material layer within the openings;    removing a portion of the polysilicon layer and the silicon nitride layer to expose the doped oxide layer adjacent a segment of the outer surface of the conductive container structures, while retaining portions of the silicon nitride layer connecting adjacently positioned conductive container structures; and    removing a portion of the doped oxide layer selectively relative to the polysilicon layer, the silicon nitride layer, and the conductive material layer to expose the segment of the outer surface of the conductive container structures by applying an etch solution comprising an about 5:1:0-3 to 20:1:0-3 (v/v/v) mixture of an organic acid:hydrofluoric acid:inorganic acid, the organic acid having a dielectric constant of about 20 or less.    
   
   
       36 . A method of forming a plurality of capacitor devices, comprising the steps of: 
 providing a construction comprising a memory cell array region, a peripheral region, and an intermediate region therebetween;    forming a layer of doped oxide extending over said regions;    forming a layer of silicon nitride over the doped oxide layer;    forming openings extending into the doped oxide layer over the memory cell array region, and a trench extending into the doped oxide layer over the intermediate region;    forming a conductive layer within the openings and the trench, the conductive layer within the openings forming a conductive container structure having an opening extending therein, an outer sidewall along the doped oxide layer, and laterally opposed inner sidewall within the opening;    removing a portion of the silicon nitride layer to expose the doped oxide layer adjacent a segment of the outer surface of the conductive container structures, while retaining portions of the silicon nitride layer connecting adjacently positioned conductive container structures; and    removing a portion of the doped oxide layer selectively relative to the silicon nitride and the conductive material layer to expose the segment of the outer surface of the conductive container structures by applying an etch solution comprising an about 5:1:0-3 to 20:1:0-3 (v/v/v) mixture of an organic acid:hydrofluoric acid:inorganic acid, the organic acid having a dielectric constant of about 20 or less.    
   
   
       37 . A method of forming a plurality of capacitor devices, comprising the steps of: 
 providing a construction comprising: 
 a memory cell array region, a peripheral region, and an intermediate region therebetween;  
 a doped oxide layer over said regions;  
 a plurality of electrically conductive container structures within the doped oxide layer over the memory cell array region, the container structures comprising an opening extending therein, an outer sidewall along the doped oxide layer, and laterally opposed inner sidewall within the opening; and  
 a silicon nitride layer overlying portions of the doped oxide layer and interconnecting adjacently positioned conductive container structures, with other portions of the doped oxide layer exposed adjacent a segment of the outer surface of the conductive container structures; and  
   applying an etch solution to etch the doped oxide layer selectively relative to the silicon nitride layer to expose the outer surface of the conductive container structures, the etch solution comprising an about 5:1:0-3 to 20:1:0-3 (v/v/v) mixture of an organic acid:hydrofluoric acid:inorganic acid, the organic acid having a dielectric constant of about 20 or less.    
   
   
       38 . The method of  claim 37 , wherein the container structures comprise titanium nitride.  
   
   
       39 . The method of  claim 37 , wherein the construction further comprises a layer of silicon overlying the silicon nitride layer.  
   
   
       40 . The method of  claim 37 , wherein the construction further comprises a trench extending into the doped oxide layer over the intermediate region, the trench laterally surrounding the memory cell array, and an electrically conductive layer lining the trench.  
   
   
       41 . The method of  claim 40 , wherein a layer of silicon overlies the conductive layer within the trench.  
   
   
       42 . The method of  claim 37 , wherein the container structures extend in an array comprising rows and columns, and the silicon nitride layer extends between and interconnects pairs of the rows of the array.