Dry etching method

Abstract

The invention provides a dry etching method for performing a wiring process on a semiconductor substrate using a plasma etching apparatus, wherein the wiring process is performed without causing disconnection or deflection of the wiring. The invention provides a dry etching method for performing a wiring process on a semiconductor substrate using a plasma etching apparatus, wherein during a step for etching a material 12 to be etched using a mask pattern composed of a photoresist 15 and inorganic films 14 and 13 made of SiN, SiON, SiO and the like formed on the material 12 to be etched, a mixed gas formed of a halogen-based gas such as chlorine-containing gas or bromine-containing gas and at least one fluorine-containing gas selected from a group of fluorine-containing gases composed of CF 4 , CHF 3 , SF 6 and NF 3 is used to reduce the mask pattern and the processing dimension of the material to be etched substantially equally during processing of the material 12 to be etched.

1 . A dry etching method for performing a wiring process on a semiconductor substrate using a plasma etching apparatus, the method comprising:
 a step of etching a material to be etched using a mask pattern composed of an inorganic film made of SiN, SiON, SiO and the like disposed on the material to be etched, wherein during processing of the material to be etched, the mask pattern and the processing dimension of the material to be etched are reduced substantially equally.   
   
   
       2 . The dry etching method according to  claim 1 , wherein the reduction of the processing dimension is performed using a mixed gas composed of a halogen-based gas such as a chlorine-containing gas or a bromine-containing gas and at least one fluorine-containing gas selected from a group of fluorine-containing gases composed of CF 4 , CHF 3 , SF 6  and NF 3 . 
   
   
       3 . The dry etching method according to  claim 1 , wherein the reduction of the processing dimension is performed using a mixed gas composed of a halogen-based gas such as a chlorine-containing gas or a bromine-containing gas and at least one fluorine-containing gas selected from a group of fluorine-containing gases composed of CF 4 , CHF 3 , SF 6  and NF 3 , the ratio of the fluorine-containing gas being 40 to 90 percent of the mixed gas. 
   
   
       4 . The dry etching method according to  claim 1 , wherein the reduction of the processing dimension is realized by controlling an RF bias of the plasma etching apparatus, according to which the reduction ratio of the material to be etched is adjusted. 
   
   
       5 . The dry etching method according to  claim 1 , wherein the reduction of the processing dimension is performed using a mixed gas composed of a halogen-based gas such as a chlorine-containing gas or a bromine-containing gas and at least one fluorine-containing gas selected from a group of fluorine-containing gases composed of CF 4 , CHF 3 , SF 6  and NF 3 , the reduction ratio of the material to be etched being adjusted by controlling an RF bias of the plasma etching apparatus. 
   
   
       6 . A dry etching method for performing a wiring process on a semiconductor substrate using a plasma etching apparatus; the method comprising:
 a step of etching a material to be etched using a mask pattern composed of a photoresist and an inorganic film made of SiN, SiON, SiO and the like disposed on the material to be etched, wherein during processing of the material to be etched, the mask pattern and the processing dimension of the material to be etched are reduced substantially equally.   
   
   
       7 . The dry etching method according to  claim 6 , wherein the reduction of the processing dimension is performed using a mixed gas composed of a halogen-based gas such as a chlorine-containing gas or a bromine-containing gas and at least one fluorine-containing gas selected from a group of fluorine-containing gases composed of CF 4 , CHF 3 , SF 6  and NF 3 . 
   
   
       8 . The dry etching method according to  claim 6 , wherein the reduction of the processing dimension is performed using a mixed gas composed of a halogen-based gas such as a chlorine-containing gas or a bromine-containing gas and at least one fluorine-containing gas selected from a group of fluorine-containing gases composed of CF 4 , CHF 3 , SF 6  and NF 3 , the ratio of the fluorine-containing gas being 40 to 90 percent of the mixed gas. 
   
   
       9 . The dry etching method according to  claim 6 , wherein the reduction of the processing dimension is realized by controlling an RF bias of the plasma etching apparatus, according to which the reduction ratio of the material to be etched is adjusted. 
   
   
       10 . The dry etching method according to  claim 6 , wherein the reduction of the processing dimension is performed using a mixed gas composed of a halogen-based gas such as a chlorine-containing gas or a bromine-containing gas and at least one fluorine-containing gas selected from a group of fluorine-containing gases composed of CF 4 , CHF 3 , SF 6  and NF 3 , the reduction ratio of the material to be etched being adjusted by controlling an RF bias of the plasma etching apparatus. 
   
   
       11 . A dry etching method for performing a wiring process on a wiring layer disposed on a semiconductor substrate using a mask pattern formed of a photoresist and an inorganic film composed of SiN, SiON, SiO or the like in a plasma etching apparatus, the method comprising:
 a first step of reducing using O 2  the mask pattern formed of the photoresist;   a second step of utilizing the reduced mask pattern formed of the photoresist so as to perform anisotropic etching of the mask pattern formed of the inorganic film composed of SiN, SiON, SiO or the like using a mixed gas containing CF 4  and CHF 3 ;   a third step of utilizing the mask pattern of the photoresist and the inorganic film composed of SiN, SiON, SiO or the like to etch the wiring layer and also reduce the mask pattern using a mixed gas containing Cl 2  and CF 4 ; and   a fourth step of utilizing the mask pattern of the inorganic film composed of SiN, SiON, SiO or the like subsequent to the third step to etch the wiring layer using a mixed gas containing HBr and O 2 .