Method and system for logic verification using mirror interface

Abstract

Verification of external interfaces of cores on system-on-chip (SOC) designs frequently entails the purchase of costly standardized software models to test the external interfaces. Typically, the standardized models provide more functionality than is needed. Instead of standardized models, test models may be developed and utilized, but this also incurs cost and delay. The present invention provides an efficient and economical alternative. A mirror interface, or copy of the external interface undergoing verification, is used with a standardized control mechanism to verify the external interface. Because all interface I/O connections can thereby be utilized, a cost-effective and highly reusable way of verifying such interfaces is provided.

1 . A verification test bench system used in testing in a core which is used in a design, the system comprising: 
 a processor configured to implement a bus functional model coupled, through a mirror interface, to an external interface of a core undergoing verification and memory,    wherein the mirror interface is an exact copy of the external interface;    a bi-directional general purpose I/O device; and    a control mechanism comprising: 
 means for implementing a standardized handshake protocol between the design and the mirror interface; and  
 a source for control code which, when loaded into the bus functional model, controls data flow, transfer direction, and data checking when a test case is running in the design.  
   
   
   
       2 . The verification test bench system of  claim 1 , wherein said core is coupled to said external interface, and said control mechanism issues directives in said handshake protocol to initiate and control an exchange of data between said mirror interface and the external interface.  
   
   
       3 . A verification method comprising: 
 attaching a mirror interface to an external interface of a core in a system-on-chip (SOC) undergoing verification, wherein the mirror interface is an exact copy of the external interface; and    executing a test case in said SOC which applies test stimuli to said external interface using said mirror interface.    
   
   
       4 . The method of  claim 3 , further comprising providing a control mechanism for enabling said test case to configure and control said mirror interface.  
   
   
       5 . The method of  claim 4 , wherein said providing a control mechanism comprises: 
 implementing a standardized handshake protocol for communicating with said SOC; and    providing control code for configuring said mirror interface and transferring data to said external interface via said mirror interface.    
   
   
       6 . The method of  claim 5 , further comprising: 
 issuing directives in said handshake protocol using said control code to configure said mirror interface; and    initiating data transfer between said mirror interface and said external interface.    
   
   
       7 . A computer program product tangibly embodied on a computer-usable medium, said program product comprising computer-executable instructions which when executed implement a process comprising the steps of: 
 connecting an external interface of a core on to a mirror interface of said external interface, wherein the mirror interface is an exact copy of the external interface; and    executing a test case in a system-on-chip (SOC) design to apply test stimuli for verification of said external interface via said mirror interface.    
   
   
       8 . The computer program product of  claim 7 , said process further comprising executing a control mechanism for enabling said test case to control said mirror interface.  
   
   
       9 . The program product of  claim 7 , said process further comprising implementing communication means for enabling said test case to communicate with said mirror interface.