US2007202698A1PendingUtilityA1
Methods for fabricating one or more metal damascene structures in a semiconductor wafer
Individually held — no corporate assignee on recordPriority: Nov 10, 2004Filed: May 1, 2007Published: Aug 30, 2007
Est. expiryNov 10, 2024(expired)· nominal 20-yr term from priority
Inventors:In-Kwon Jeong
H10P 95/062H10P 95/04H10P 52/403H10P 52/203H10W 20/062H10P 52/00H10D 64/011
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Claims
Abstract
Methods for fabricating one or more metal (e.g., copper) damascene structures in a semiconductor wafer use at least three polishing steps to reduce erosion topography in the resulting metal damascene structures and/or increase throughput. The polishing steps may be performed at four polishing units of a polishing apparatus, which may include one or more pivotable load/unload cups to transfer the semiconductor wafer between some of the polishing units.
Claims
exact text as granted — not AI-modified1 . A method for fabricating a metal damascene structure in a semiconductor wafer, said method comprising:
providing said semiconductor wafer that includes a dielectric layer with trenches below an upper surface, a barrier layer over said dielectric layer and a metal layer over said barrier layer; removing an upper portion of said metal layer using a first polishing technique such that a lower portion of said metal layer remains over said barrier layer on said upper surface of said dielectric layer; removing said lower portion of said metal layer using a second polishing technique until said barrier layer on said upper surface of said dielectric layer is exposed; removing said barrier layer on said upper surface of said dielectric layer using a third polishing technique until said upper layer of said dielectric layer is exposed to produce said metal damascene structure with erosion topography; and planarizing said metal damascene structure with said erosion topography using a fourth polishing technique to reduce said erosion topography of said metal damascene structure.
2 . The method of claim 1 wherein said removing of said upper portion of said metal layer includes performing a first chemical-mechanical polishing using a first slurry and wherein said removing of said lower portion of said metal layer includes performing a second chemical-mechanical polishing using a second slurry, said second chemical-mechanical polishing having a lower removal rate than said first chemical-mechanical polishing.
3 . The method of claim 1 wherein said planarizing of said metal damascene structure with said erosion topography includes performing a chemical-mechanical polishing using a slurry, said slurry having a higher removal rate of said dielectric layer than said metal layer and said barrier layer.
4 . The method of claim 1 wherein said upper portion of said metal layer is thicker than said lower portion of said metal layer.
5 . The method of claim 1 wherein said removing of said upper portion of said metal layer includes performing one of electro-chemical-mechanical polishing and electrochemical polishing.
6 . The method of claim 1 wherein said removing of said upper portion of said metal layer includes polishing said upper portion of said metal layer at a first polishing unit of a polishing apparatus, wherein said removing of said lower portion of said metal layer includes polishing said lower portion of said metal layer at a second polishing unit of said polishing apparatus, wherein said removing of said barrier layer includes polishing said barrier layer on said upper surface of said dielectric layer at a third polishing unit of said polishing apparatus, and wherein said planarizing said metal damascene structure with said erosion topography includes polishing said metal damascene structure with said erosion topography at a fourth polishing unit of said polishing apparatus.
7 . The method of claim 6 wherein said removing of said upper portion of said metal layer includes polishing said upper portion of said metal layer using a first wafer polishing head at said first polishing unit of a polishing apparatus, wherein said removing of said lower portion of said metal layer includes polishing said lower portion of said metal layer using a second wafer polishing head at said second polishing unit of said polishing apparatus, wherein said removing of said barrier layer includes polishing said barrier layer on said upper surface of said dielectric layer using a third wafer polishing head at said third polishing unit of said polishing apparatus, and wherein said planarizing said metal damascene structure with said erosion topography includes polishing said metal damascene structure with said erosion topography using said fourth wafer polishing head at said fourth polishing unit of said polishing apparatus.
8 . The method of claim 6 further comprising transferring said semiconductor wafer between said first, second, third and fourth polishing units of said polishing apparatus using at least one pivotable load/unload cup.
9 . The method of claim 8 wherein said transferring of said semiconductor wafer between said first, second, third and fourth polishing units includes:
transferring said semiconductor wafer from said first polishing unit to said second polishing unit using a first pivotable load/unload cup; transferring said semiconductor wafer from said second polishing unit to said third polishing unit using a second pivotable load/unload cup; and transferring said semiconductor wafer from said third polishing unit to said fourth polishing unit using a third pivotable load/unload cup.
10 . A method for fabricating a metal damascene structure in a semiconductor wafer, said method comprising:
providing said semiconductor wafer at a polishing apparatus that comprises four polishing units, said semiconductor wafer including a dielectric layer with trenches below an upper surface, a barrier layer over said dielectric layer and a metal layer over said barrier layer; removing an upper portion of said metal layer using a first polishing technique at a first polishing unit of said polishing apparatus such that a lower portion of said metal layer remains over said barrier layer on said upper surface of said dielectric layer; removing said lower portion of said metal layer using a second polishing technique at a second polishing unit of said polishing apparatus until said barrier layer on said upper surface of said dielectric layer is exposed; and removing said barrier layer on said upper surface of said dielectric layer using a third polishing technique at a third polishing unit of said polishing apparatus until said upper layer of said dielectric layer is exposed to produce said metal damascene structure.
11 . The method of claim 10 further comprising planarizing said metal damascene structure using a fourth polishing technique at a fourth polishing unit of said polishing apparatus to reduce erosion topography of said metal damascene structure.
12 . The method of claim 11 wherein said planarizing of said metal damascene structure includes performing a chemical-mechanical polishing using a slurry at said fourth polishing unit of said polishing apparatus, said slurry having a higher removal rate of said dielectric layer than said metal layer and said barrier layer.
13 . The method of claim 10 wherein said removing of said upper portion of said metal layer includes performing a first chemical-mechanical polishing using a first slurry at said first polishing unit of said polishing apparatus and wherein said removing of said lower portion of said metal layer includes performing a second chemical-mechanical polishing using a second slurry at said second polishing unit of said polishing apparatus, said second chemical-mechanical polishing having a lower removal rate than said first chemical-mechanical polishing.
14 . The method of claim 10 wherein said removing of said upper portion of said metal layer includes performing one of electro-chemical-mechanical polishing and electro-chemical polishing at said first polishing unit of said polishing apparatus.
15 . The method of claim 10 further comprising transferring said semiconductor wafer between some of said first, second and third polishing units of said polishing apparatus using at least one pivotable load/unload cup.
16 . The method of claim 15 wherein said transferring of said semiconductor wafer between some of said first, second and third polishing units includes:
transferring said semiconductor wafer from said first polishing unit to said second polishing unit using a first pivotable load/unload cup; and transferring said semiconductor wafer from said second polishing unit to said third polishing unit using a second pivotable load/unload cup.Join the waitlist — get patent alerts
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