Semiconductor integrated circuit and test system for testing the same

Abstract

A semiconductor integrated circuit includes a pin section, internal circuits, an interface section, an expectation value generation circuit, a comparison circuit and a waveform generation circuit. In a first test mode, the expectation value generation circuit generates expectation values of operation signals to be generated by the interface section when first test signals having the same waveform are input via respective pins of the pin section, and the comparison circuit compares operation signals that are actually produced by the interface section with the respective expectation values and produces comparison results. In a second test mode, the waveform generation circuit supplies second test signals to the interface section, and the interface section outputs test output signals having the same waveform to the external system via respective pins of the pin section.

1 - 4 . (canceled)  
     
     
         5 . A semiconductor integrated circuit comprising: 
 a pin section having a plurality of pins;    internal circuits;    an interface section for producing operation signals for causing operation of the internal circuits at the time of receiving signals from an external system via the pin section, and for outputting, to the external system, via the pin section, data that are read from the internal circuits;    an expectation value generation circuit; and    a comparison circuit;    wherein, in a first test mode, the expectation value generation circuit generates expectation values of operation signals to be generated by the interface section when signals having the same waveform as each other are input as first test signals via respective pins section to the interface section, and the comparison circuit compares operation signals that are actually produced by the interface section with the respective expectation values and produces comparison results.    
     
     
         6 . A semiconductor integrated circuit comprising: 
 a pin section having a plurality of pins;    internal circuits;    an interface section for producing operation signals for causing operation of the internal circuits at the time of receiving signals from an external system via the pin section, and for outputting, to the external system, via the pin section, data that are read from the internal circuits; and    a waveform generation circuit;    wherein, in a second test mode, the waveform generation circuit supplies second test signals to the interface section, and the interface section outputs test output signals having the same waveform to the external system via respective pins of the pin section.