Semiconductor device and method of manufacturing the same

Abstract

A semiconductor device includes a silicon substrate, a strain-inducing layer, a silicon layer, a FET, and an isolation region. On the silicon substrate, the strain-inducing layer is provided. On the strain-inducing layer, the silicon layer is provided. The strain-inducing layer induces lattice strain in a channel region of the FET in the silicon layer. The silicon layer includes the FET. The FET includes a source/drain region, an SD extension region, a gate electrode and a sidewall. The source/drain region and the strain-inducing layer are spaced from each other. Around the FET, the isolation region is provided. The isolation region penetrates the silicon layer so as to reach the strain-inducing layer.

1 . A semiconductor device comprising:
 a silicon substrate;   a strain-inducing layer provided on said silicon substrate;   a silicon layer provided on said strain-inducing layer;   a field effect transistor provided in said silicon layer; and   an isolation region provided around said field effect transistor, and penetrating said silicon layer so as to reach said strain-inducing layer;   wherein said strain-inducing layer is spaced from a source/drain region of said field effect transistor, and induces strain in a channel portion of said field effect transistor in said silicon layer.   
   
   
       2 . The semiconductor device according to  claim 1 , wherein said strain-inducing layer is a SiGe layer. 
   
   
       3 . The semiconductor device according to  claim 1 , wherein said isolation region penetrates said silicon layer and said strain-inducing layer so as to reach said silicon substrate. 
   
   
       4 . The semiconductor device according to  claim 3 , wherein said isolation region reaches an inner portion of said silicon substrate. 
   
   
       5 . The semiconductor device according to  claim 1 , wherein said strain-inducing layer has a generally uniform thickness in a region surrounded by said isolation region. 
   
   
       6 . The semiconductor device according to  claim 1 , wherein an N-channel type field effect transistor and a P-channel type field effect transistor are provided as said field effect transistor; and
 said N-channel type field effect transistor and said P-channel type field effect transistor are isolated from each other via said isolation region.   
   
   
       7 . A method of manufacturing a semiconductor device that includes a field effect transistor, comprising:
 forming an isolation region on a silicon substrate so as to surround a region where said field effect transistor is to be formed;   epitaxially growing a strain-inducing layer on said silicon substrate on which said isolation region is formed;   epitaxially growing a silicon layer on said strain-inducing layer; and   forming said field effect transistor in said silicon layer so that a source/drain region is spaced from said strain-inducing layer;   wherein said strain-inducing layer induces strain in a channel portion of said field effect transistor in said silicon layer.   
   
   
       8 . The method according to  claim 7 , wherein said forming of said isolation region includes forming said isolation region in a surface layer of said silicon substrate, and then reducing a thickness of said silicon substrate from a side of said surface layer. 
   
   
       9 . The method according to  claim 7 , wherein said forming of said isolation region includes forming an insulating layer on said silicon substrate, and then patterning said insulating layer into said isolation region.