US2007187767A1PendingUtilityA1

Semiconductor device including misfet

Assignee: TOSHIBA KKPriority: Feb 13, 2006Filed: Feb 9, 2007Published: Aug 16, 2007
Est. expiryFeb 13, 2026(expired)· nominal 20-yr term from priority
H10D 64/0112H10D 64/021H10D 64/017H10D 62/822H10D 30/0212H10D 62/021H10D 30/797
47
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Claims

Abstract

A semiconductor device includes a semiconductor substrate, a gate insulating film, a gate electrode, a source/drain layer, and a germanide layer. The gate insulating film is formed on the semiconductor substrate. The gate electrode is formed on the gate insulating film. The source/drain layer is formed on both sides of the gate electrode, contains silicon germanium, and has a germanium layer in a surface layer portion. The germanide layer is formed on the germanium layer of the source/drain layer.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device comprising: 
 a semiconductor substrate;    a gate insulating film formed on the semiconductor substrate;    a gate electrode formed on the gate insulating film;    a source/drain layer formed on both sides of the gate electrode, the source/drain layer containing silicon germanium and having a germanium layer in a surface layer portion; and    a germanide layer formed on the germanium layer of the source/drain layer.    
   
   
       2 . The semiconductor device according to  claim 1 , wherein a germanium concentration of the silicon germanium is not lower than 10 at %.  
   
   
       3 . The semiconductor device according to  claim 1 , 
 wherein a germanium concentration of the silicon germanium continuously varies from the surface layer portion toward a deep layer portion of the source/drain layer.    
   
   
       4 . The semiconductor device according to  claim 1 , further comprising: 
 a sidewall insulating film formed on a side surface of the gate electrode; and    an extension layer formed on the semiconductor substrate below the sidewall insulating film, the extension layer being arranged between the source/drain layer and a channel region below the gate insulating film.    
   
   
       5 . The semiconductor device according to  claim 1 , 
 wherein the germanide layer contains one of a nickel germanide layer, a cobalt germanide layer, a titanium germanide layer, an iridium germanide layer, a platinum germanide layer, and a palladium germanide layer.    
   
   
       6 . The semiconductor device according to  claim 1 , 
 wherein the source/drain layer containing the silicon germanium gives a compression stress to a channel region below the gate insulating film.    
   
   
       7 . The semiconductor device according to  claim 6 , 
 wherein the channel region forms a channel of a p-channel MOS field effect transistor.    
   
   
       8 . A semiconductor device comprising: 
 a semiconductor substrate;    a gate insulating film formed on the semiconductor substrate;    a gate electrode formed on the gate insulating film;    a first sidewall insulating film formed on a side surface of the gate electrode;    a second sidewall insulating film formed on a side surface of the first sidewall insulating film;    a first source/drain layer formed below the second sidewall insulating film, the first source/drain layer containing silicon germanium;    a second source/drain layer formed in contact with the first source/drain layer on an outer side of the second sidewall insulating film, the second source/drain layer containing silicon germanium and having a germanium layer in a surface layer portion; and    a germanide layer formed on the germanium layer of the second source/drain layer.    
   
   
       9 . The semiconductor device according to  claim 8 , 
 wherein at least one of a surface of the first source/drain layer and a surface of the second source/drain layer is positioned above a surface of the semiconductor substrate.    
   
   
       10 . The semiconductor device according to  claim 8 , 
 wherein the first source/drain layer has a germanium layer in a surface layer portion.    
   
   
       11 . The semiconductor device according to  claim 10 , 
 wherein the germanide layer is in contact with the germanium layer in the surface layer portion of the first source/drain layer.    
   
   
       12 . The semiconductor device according to  claim 8 , 
 wherein a germanium concentration of the silicon germanium contained in the second source/drain layer continuously varies from the surface layer portion toward a deep layer portion of the second source/drain layer.    
   
   
       13 . The semiconductor device according to  claim 8 , 
 wherein a germanium concentration of the silicon germanium contained in the second source/drain layer is not lower than 10 at %.    
   
   
       14 . The semiconductor device according to  claim 8 , 
 wherein the germanide layer contains one of a nickel germanide layer, a cobalt germanide layer, a titanium germanide layer, an iridium germanide layer, a platinum germanide layer, and a palladium germanide layer.    
   
   
       15 . The semiconductor device according to  claim 8 , 
 wherein the first source/drain layer and the second source/drain layer containing the silicon germanium give a compression stress to a channel region below the gate insulating film.    
   
   
       16 . The semiconductor device according to  claim 15 , 
 wherein the channel region forms a channel of a p-channel MOS field effect transistor.    
   
   
       17 . A semiconductor device comprising: 
 a semiconductor substrate;    a first silicon germanium layer formed on the semiconductor substrate;    a second silicon germanium layer formed on the semiconductor substrate apart from the first silicon germanium layer;    a gate insulating film formed on the semiconductor substrate between the first silicon germanium layer and the second silicon germanium layer;    a gate electrode formed on the gate insulating film;    a first germanium layer formed on the first silicon germanium layer;    a first germanide layer formed on the first germanium layer;    a second germanium layer formed on the second silicon germanium layer; and    a second germanide layer formed on the second germanium layer.    
   
   
       18 . The semiconductor device according to  claim 17 , 
 wherein germanium concentrations of the first and second silicon germanium layers are not lower than 10 at %.    
   
   
       19 . The semiconductor device according to  claim 17 , 
 wherein surfaces of the first and second germanium layers are positioned above a surface of the semiconductor substrate.    
   
   
       20 . The semiconductor device according to  claim 17 , 
 wherein the first and second silicon germanium layers have a germanium concentration which varies continuously from a surface layer portion toward a deep layer portion.

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