US2007187741A1PendingUtilityA1

Thin film transistor substrate, method of manufacturing the same and display apparatus having the same

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Apr 22, 2005Filed: Mar 23, 2007Published: Aug 16, 2007
Est. expiryApr 22, 2025(expired)· nominal 20-yr term from priority
H10D 86/40H10D 86/481H10D 86/80H10D 86/60G02F 1/1368G02F 1/136213
47
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

In a thin film transistor substrate, a method of manufacturing the same, and a display apparatus having the same, a thin film transistor, a gate member, and a storage member are formed on an insulating substrate. The gate member has a gate line and a gate electrode electrically connected to the gate line, and the storage member has a storage line, a first storage electrode, and a second storage electrode. A data member is formed on an active layer. The data member includes a data line crossing the gate line, a third storage electrode overlapped with the first storage electrode and a fourth storage electrode overlapped with the second storage electrode. Thus, a capacitance variation of a storage capacitor may be prevented, thereby improving display quality of a display apparatus.

Claims

exact text as granted — not AI-modified
1 - 37 . (canceled)  
   
   
       38 . A thin film transistor substrate comprising: 
 first and second storage capacitors formed on a substrate; and    a pixel electrode electrically connected with at least one of the first and second storage capacitors via a contact hole.    
   
   
       39 . The thin film transistor substrate of  claim 38 , further comprising an active layer overlapping at least one of the first and second storage capacitors.  
   
   
       40 . The thin film transistor substrate of  claim 38 , wherein the first and second storage capacitors are disposed such that an applied voltage results in oppositely oriented electrical fields at the first and second storage capacitors.  
   
   
       41 . The thin film transistor substrate of  claim 40 , wherein a capacitance variation of the first storage capacitor is compensated by that of the second storage capacitor, so that total capacitance of the first and second storage capacitors is maintained.  
   
   
       42 . The thin film transistor substrate of  claim 40 , wherein each of the first and second storage capacitors includes a metal oxide semiconductor structure.  
   
   
       43 . The thin film transistor substrate of  claim 40 , further comprising a thin film translator having gate, source and drain terminals, and being formed on the substrate.  
   
   
       44 . The thin film transistor substrate of  claim 43 , wherein the first and second storage 
 capacitors are electrically connected to the drain terminal of the thin film transistor in parallel.    
   
   
       45 . The thin film transistor substrate of  claim 43 , wherein at least one of the first and second capacitors is electrically connected to the drain terminal of the thin film transistor directly.  
   
   
       46 . The thin film transistor substrate of  claim 43 , wherein the first storage capacitor includes first and third storage electrodes, 
 the second storage capacitor includes second and fourth storage electrodes.    the first and second storage electrodes is included in a storage member including a storage line,    the third and fourth storage electrodes is included In a data member including a data line, the second storage electrode is formed from the storage member and is electrically connected to the drain terminal of the thin film transistor, and    the third storage electrode is formed from the data member and is electrically connected to the drain terminal of the thin film transistor.    
   
   
       47 . The thin film transistor substrate of  claim 46 , wherein the first storage electrode is formed from the storage member and is electrically connected to the storage line of the storage member, and 
 the fourth storage electrode is formed from the data member and is electrically connected to the storage line of the data member.

Join the waitlist — get patent alerts

Track US2007187741A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.