US2007178712A1PendingUtilityA1

Planarization for Integrated Circuits

Assignee: TEXAS INSTRUMENTS INCPriority: Mar 29, 2002Filed: Jan 22, 2007Published: Aug 2, 2007
Est. expiryMar 29, 2022(expired)· nominal 20-yr term from priority
Inventors:Michael Brenner
H10W 20/081H10W 20/062H10W 20/071
47
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A method of planarizing a layer of an integrated circuit. In one embodiment, a liquid film is applied over the layer, using extrusion coating techniques. In another embodiment, the layer itself may be applied as a liquid film, using extrusion techniques.

Claims

exact text as granted — not AI-modified
1 . A method of providing a planarized layer of an integrated circuit, comprising: 
 depositing a layer as a liquid film by means of extrusion;    forming a recess in the layer; and    forming a conductor within the recess in the layer.    
   
   
       2 . The method of  claim 1  and further comprising curing the liquid film by performing a thermal step.  
   
   
       3 . The method of  claim 1  and further comprising curing the liquid by performing a photochemical step.  
   
   
       4 . The method of  claim 1  wherein the substantially planar surface is planarized to less than 250 angstroms.  
   
   
       5 . The method of  claim 1  wherein forming a recess in the layer comprises removing a sacrificial material.

Join the waitlist — get patent alerts

Track US2007178712A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.