Methods for forming alignment marks on semiconductor devices

Abstract

A semiconductor device includes alignment marks that are aligned with device features. The semiconductor device includes a device feature, a pair of first alignment marks, a pair of second alignment marks, and a pair of third alignment marks. The first alignment marks are aligned along a first direction with the device feature and adjacent to opposite sides of the device feature. The second alignment marks are aligned along a second direction with the device feature that is substantially perpendicular to the first direction, and adjacent to opposite sides of the device feature. The third alignment marks are aligned with the first alignment marks in the first direction and adjacent to opposite sides of the device feature, wherein the third marks are between the first alignment marks and the device feature, and each of the third marks have a shorter length along the first direction than each of the first alignment marks.

1 . A method for forming alignment marks on a semiconductor device having a device feature, the method comprising: 
 forming a pair of first alignment marks on the semiconductor device that are aligned along a first direction with the device feature and adjacent to opposite sides of the device feature;    forming a pair of second alignment marks on the semiconductor device that are aligned along a second direction with the device feature, which is substantially perpendicular to the first direction, and adjacent to opposite sides of the device feature; and    forming a pair of third alignment marks on the semiconductor device that are aligned with the first alignment marks in the first direction and adjacent to opposite sides of the device feature, wherein the third alignment marks are between the first alignment marks and the device feature, and each of the third alignment marks have a shorter length along the first direction than each of the first alignment marks.    
   
   
       2 . The method of  claim 1 , wherein: 
 forming a pair of first alignment marks comprises depositing the first alignment marks on the semiconductor device; and    forming a pair of second alignment marks comprises depositing the second alignment marks on the semiconductor device.    
   
   
       3 . The method of  claim 1 , wherein forming a pair of second alignment marks comprises forming one of the second alignment marks on the device feature.  
   
   
       4 . The method of  claim 1 , wherein forming a pair of third alignment marks comprises etching the semiconductor device to generate a pair of trenches that are aligned with the first alignment marks in the first direction and adjacent to opposite sides of the device feature, wherein the pair of trenches are between the first alignment marks and the device feature, and each of the trenches have a shorter length along the first direction than each of the first alignment marks.  
   
   
       5 . The method of  claim 1 , further comprising etching the semiconductor device to form a pair of trenches as fourth alignment marks directly connected to the first alignment marks and aligned therewith, wherein the first alignment marks are between the fourth alignment marks and the device feature.  
   
   
       6 . The method of  claim 1 , further comprising forming a first auxiliary alignment mark on the semiconductor device that is aligned with the second alignment marks and the device feature along the second direction, wherein one of the second alignment marks is between the first auxiliary alignment mark and the device feature, and wherein the first auxiliary alignment mark has a variable cross-section width along the first direction.  
   
   
       7 . The method of  claim 6 , wherein the first auxiliary alignment mark has at least one of a lozenge shape, a triangular shape, and a circular shape.  
   
   
       8 . The method of  claim 1 , further comprising etching the semiconductor device to form a pair of trenches as second auxiliary alignment marks that are offset along the second direction from each other, and are adjacent to opposite sides of one of the second alignment marks.  
   
   
       9 . The method of  claim 1 , wherein each of the third alignment marks have a length in the second direction that is about 0.5 times to about 1.5 times a length of the device feature in the second direction.  
   
   
       10 . The method of  claim 1 , wherein each of the third alignment marks have a length in the first direction of about 0.5 μm to about 2 μm and a length in the second direction of about 0.05 μm to about 0.2 μm.  
   
   
       11 . The method of  claim 10 , wherein each of the first alignment marks have a length in the first direction of about 1 μm to about 5 μm and a length in the second direction of about 0.5 μm to about 2 μm.  
   
   
       12 . The method of  claim 11 , wherein each of the second alignment marks have a length in the first direction of about 0.1 μm to about 1 μm and a length in the second direction of about 0.5 μm to about 2 μm.