Semiconductor device and method for fabricating the same
Abstract
The semiconductor device comprises on a semiconductor substrate an insulating structure formed of a plurality of insulating films; an interconnection structure buried in the insulating structure and formed of a plurality of conducting layers; and a plurality of dummy patterns formed of the same conducting layer as the conducting layers forming the interconnection structure and buried in a surface side of the respective insulating films, and the dummy patterns near the interconnection structure are connected with each other through via portions. Thus, the insulating structure near the interconnection structure are reinforced, and the generation of cracks and peelings in the interfaces between the insulating films or in the inter-layer insulating films due to mechanical stresses or thermal stresses can be prevented.
Claims
exact text as granted — not AI-modified1 . A method for fabricating a semiconductor device comprising the steps of:
forming a first insulating film over a semiconductor substrate; burying in at least a surface side of the first insulating film a first interconnection pattern, and a first dummy pattern formed near the first interconnection pattern and formed of the same conducting layer as the first interconnection pattern; forming a second insulating film over the first insulating film with the first interconnection pattern and the first dummy pattern buried in; and burying in the second insulating film a second interconnection pattern connected to the first interconnection pattern through a via portion, and a second dummy pattern formed near the second interconnection pattern, formed of the same conducting layer as the second interconnection pattern and connected to the first dummy pattern through a via portion.
2 . A method for fabricating a semiconductor device according to claim 1 , wherein
in the step of forming the second dummy pattern, the second dummy pattern comprising a plurality of discrete patterns periodically formed are formed so as to make a pattern density of the conducting layer forming the second interconnection pattern and the second dummy pattern substantially uniform in plane.
3 . A method for fabricating a semiconductor device according to claim 2 , wherein
in the step of forming the second dummy pattern, the via portion is formed in a part of the discrete patterns arranged near the second interconnection pattern.
4 . A method for fabricating a semiconductor device according to claim 1 , wherein
the step of forming the second interconnection pattern and the second dummy pattern comprises the steps of: forming in the second insulating film a first via hole and an interconnection groove for the second interconnection pattern to be buried in, and a second via hole and a groove for the second dummy pattern to be buried in; depositing a conducting film mainly formed of copper on the second insulating film with the interconnection groove, the first via hole, the groove and the second via hole formed in; and removing the conducting film above the second insulating film to form the second interconnection pattern of the conducting film, buried in the interconnection groove and the first via hole and form the second dummy pattern of the conducting film, buried in the groove and the second via hole.
5 . A method for fabricating a semiconductor device according to claim 1 , further comprising the step of
performing wire bonding to the second interconnection pattern.
6 . A method for fabricating a semiconductor device according to claim 1 , further comprising the step of:
forming a bump over the second interconnection pattern.
7 . A method for fabricating a semiconductor device according to claim 1 , wherein
in the step of forming the first insulating film or in the step of forming the second insulating film, a film formed mainly of a polyallyl ether resin is formed.Join the waitlist — get patent alerts
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