Firmware updating circuit and firmware updating method

Abstract

A firmware updating circuit of the present invention includes an identification part and an address inversion part. The identification part stores identification data corresponding to an address of a boot loader in a non-volatile memory for storing the boot loader and a main program. When the controller updates both the boot loader and the main program, the address inversion part changes an address for reading the boot loader, output by a controller to the non-volatile memory, and an address for writing another boot loader to be updated according to the identification data so that those addresses come to be different from each other and at least one of the boot loader and the boot loader to be updated comes to exist in the non-volatile memory.

1 . A firmware updating circuit, comprising:
 an identification part for storing identification data corresponding to an address of a boot loader in a non-volatile memory for storing the boot loader and a main program; and   an address inversion part for changing an address for reading the loader, output from a controller to the non-volatile memory, and an address for writing a boot loader to be updated according to the identification data respectively so that those addresses come to be different from each other and at least one of the boot loader and the boot loader to be updated exists in the non-volatile memory when the controller updates both the boot loader and the main program.   
   
   
       2 . The circuit according to  claim 1 ,
 wherein the address inversion part executes either inversion or non-inversion for the address for reading according to the identification data, then executes the other for the address for writing.   
   
   
       3 . The circuit according to  claim 2 ,
 wherein the address inversion part executes non-inversion for the address for reading and inversion for the address for writing when the identification data is in a first state.   
   
   
       4 . The circuit according to  claim 2 ,
 wherein the address inversion part executes inversion for the address for reading and inversion for the address for writing when the identification data is in a second state.   
   
   
       5 . The circuit according to  claim 1 , further comprising a monitoring part for monitoring an updating related timeout at the time of updating,
 wherein the identification part, when the monitoring part detects a timeout, updates the identification data, and   wherein the address inversion part executes inversion and non-inversion for the address for reading and the address for writing according to the updated identification data.   
   
   
       6 . An information processing apparatus, comprising:
 a controller;   a non-volatile memory for storing a boot loader and a main program; and   the firmware updating circuit according to any of  claims 1  to  5  and connected to the controller and the non-volatile memory communicably.   
   
   
       7 . A firmware updating method, comprising the steps of:
 (a) changing or not changing an address for reading the boot loader, output from the controller, according to identification data corresponding to an address of the boot loader in the non-volatile memory so that at least one of the boot loader and another boot loader to be updated comes to exist in the non-volatile memory when a controller updates a boot loader and a main program stored in the non-volatile memory, then sending a result of the change/not change operation to the non-volatile memory; and   (b) executing the other of the change/not-change operation for an address for writing the boot loader to be updated, output from the controller, according to the identification data, then sending a result of the operation to the non-volatile memory.   
   
   
       8 . The method according to  claim 7 ,
 wherein the step (a) includes a step of:   (a1) executing either inversion or non-inversion for the address for reading according to the identification data; and   wherein the step (b) includes a step of:   (b1) executing the other of the inversion and non-inversion for the address for writing according to the identification data at the time of the updating.   
   
   
       9 . The method according to  claim 8 ,
 wherein the step (a1) includes a step of:   (a11) executing non-inversion for the address for reading when the identification data is in the first state; and   wherein the step (b1) includes a step of:   (b11) executing inversion for the address for writing when the identification data is in the first state.   
   
   
       10 . The method according to  claim 8 ,
 wherein the step (a1) includes a step of:   (a12) executing inversion for the address for reading when the identification data is in the second state; and   wherein the step (b1) includes a step of:   (b12) executing non-inversion for the address for writing when the identification data is in the second state.   
   
   
       11 . The method according to  claim 7 , further comprising the steps of:
 (c) monitoring an updating related timeout at the time of the updating;   (d) updating the identification data when the timeout is detected; and   (e) executing the steps (a) and (b) according to the updated identification data.