Storage device controller

Abstract

Provided is a storage controller capable of improving the access performance to the storage device by preventing an I/O access request to the storage device from being concentrated on certain I/O processors among a plurality of I/O processor, and causing the plurality of I/O processors to issue the I/O access request in a well balanced manner. With this storage control system, a plurality of stripe units are formed by striping the logical volume into a stripe size of an arbitrary storage capacity, and information regarding which I/O processor among the plurality of I/O processors will output the I/O request to which stripe unit among the plurality of stripe units is stored as the control information in the memory.

1 . A storage controller for outputting an I/O request to a storage device in reply to a data I/O request in file units from an information processing device, comprising: 
 a channel controller having a controller for receiving said data I/O request in file units, and a plurality of I/O processors for outputting an I/O request corresponding to said data I/O request in file units to said storage device in reply to a command from said controller;    a memory for storing control information for said controller to control said I/O processor; and    a logical volume accessible by said information processing device and configured in said storage device;    wherein a plurality of stripe units are formed by striping said logical volume into a stripe size of an arbitrary storage capacity, and information regarding which I/O processor among said plurality of I/O processors will output said I/O request to which stripe unit among said plurality of stripe units is stored as said control information in said memory.    
   
   
       2 . The storage controller according to  claim 1 , further comprising a cache memory for primarily storing write or read data to be read or written by said storage device in reply to an I/O request from said information processing device, wherein said size is of a cache slot size or larger.  
   
   
       3 . The storage controller according to  claim 1 , wherein said control information is configured so that a plurality of I/O processors do not simultaneously output an I/O request to a logical volume address formed from the same stripe unit.  
   
   
       4 . The storage controller according to  claim 1 , wherein said control information is configured so as to allocate, in each of said strip units, the processes to be respectively handled by said plurality of I/O processors.  
   
   
       5 . The storage controller according to  claim 1 , wherein, with the activation of a control driver of said controller as the turning point, said control information is formed by said driver based on said stripe size and the block address size of said logical volume.  
   
   
       6 . The storage controller according to  claim 1 , wherein said controller forms an I/O [request] from said data I/O request in file units, and said plurality of I/O processors output an I/O request to different stripe units in reply to said I/O request.  
   
   
       7 . The storage controller according to  claim 1 , wherein a plurality of logical volumes are configured in said storage device, each logical volume is subject to striping in said stripe size, and said I/O processor is associated with the strip unit of all volumes.  
   
   
       8 . The storage controller according to  claim 1 , wherein said stripe size can be changed with a management console.  
   
   
       9 . The storage controller according to  claim 1 , wherein said control information has a plurality of stripe groups formed from a plurality of said stripe units, and said I/O processor is allocated to each stripe group.  
   
   
       10 . The storage controller according to  claim 8 , wherein said control information is configured so that the same I/O processor is not allocated to a stripe unit including the same block address of the respective logical volumes.  
   
   
       11 . The storage controller according to  claim 9 , wherein said control information is configured so that a plurality of I/O processors are shifted and allocated to each of said stripe units between the respective logical volumes to prevent said plurality of I/O processors from being identical.  
   
   
       12 . The storage controller according to  claim 1 , wherein, when a part of said plurality of I/O processors is obstructed, said channel controller substitutes the obstructed I/O processor with another I/O processor that is not obstructed.  
   
   
       13 . A storage controller for outputting an I/O request to a storage device in reply to a data I/O request in file units from an information processing device, comprising: 
 a logical volume accessible by said information processing device and configured in said storage device;    a channel controller having a controller for receiving said data I/O request in file units and generating a sequential I/O, and a plurality of I/O processors for outputting said sequential I/O request to said storage device in reply to a command from said controller, wherein said controller includes in said command the cumulative total of the block address size in said logical volume to which said sequential I/O from the commencement of said sequential I/O request is output; and    a memory for storing control information for said controller to control said I/O processor;    wherein a plurality of stripe units are formed by striping said logical volume into a stripe size of an arbitrary storage capacity, and information regarding which I/O processor among said plurality of I/O processors will output said I/O request to which stripe unit among said plurality of stripe units is stored as said control information in said memory.