Process for providing submodel performance in a computer processing unit

Abstract

A simple and accurate processor derating method includes: sampling a real-time counter/clock too obtain an initial time value T 1 ; resetting an Icnt Counter; incrementing the Icnt Counter to reflect the processing of each instruction; comparing the count in the Icnt Counter to a predetermined count IcntMax and if the count in the Icnt Counter is at least IcntMax, then sampling the RTC to obtain a second time T 2 . T 1 is then subtracted from T 2 to obtain a time difference DT which is multiplied by ((1−1/DF)−1) to obtain a Degradation Delay DD period, DF being a constant having a value which is the desired submodel performance with respect to full performance. The Degradation Delay is instituted, the RTC is sampled from time to time to obtain a test third time T 3 . When a test T 3 minus T 2 is not less than DD, then T 1 is set to T 3 . Then, the procedure is repeated for a next group of instructions. Optionally, further accuracy can be achieved by treating “wait-type” and/or “RTC-access-type” instructions specially and also by calculating a DDExtra period value which is used to adjust the next DD.

1 . A process for limiting performance of a processor to a selected submodel capability comprising the steps of: 
 a. Sample a Real Time Clock (RTC) to obtain a first time Value T 1 ;    b. Reset an institution count (Icnt) Counter;    c. Process instructions while incrementing the lent counter to reflect the processing of each instruction;    d. Compare the count in the Icnt Counter to a predetermined Counter Instruction Count Maximum (IcntMax); and 
 i. If the count in the lcnt Counter is less than IcntMax, then return to step c; and  
 ii. If the counter in said lcnt Counter is at least IcntMax, then proceed to step e;  
   e. Sample the RTC to obtain a second time T 2 ;    f. Subtract T 1  from T 2  to obtain a time difference DT;    g. Multiply DT by ((1−1/DF)−1) to obtain a Degradation Delay DD period. Degradation Factor DF being a constant having a value which is the desired submodel performance with respect to full performance;    h. Delay;    During step h, sample the RTC to obtain it test third time T 3 ; 
 i. If test third time T 3 -minus T 2  is less than DD, then continue step h; and  
 ii. If test third time T 3  minus T 2  is not less than DD, then proceed to step j;  
   j. Set T 1  equal to T 3  as used in step i.ii; and    k. Go to step b.    
   
   
       2 . A process for limiting performance of a processor to a selected submodel capability comprising the steps of: 
 a. Sample a Real Time Clock(RTC) to obtain a first time value T 1 ;    b. Reset an Instruction Count(Icnt) Counter;    c. Process instructions while incrementing the Icnt to reflect the processing of each instruction;    d. Compare the Count in the Icnt Counter to a predetermined count Instruction Count Maximum(IcntMax); and p 2  i. If the count in the Icnt Counter is less than IcntMax, then return to step c; and p 2  ii. If the count in said Icnt Counter is at least IcntMax, then proceed to step e;    e. Sample the RTC to obtain a second time T 2 ;    f. Subtract T 1  from T 2  to obtain a time difference DT;    g. Multiply DT by ((1−1/DF)−1) to obtain a Degradation Delay DD period. Degradation Factor DF being a constant having a value which is the desired submodel performance with respect to full performance;    h. Delay;    i. During step h, sample the RTC to obtain a test third time T 3 ; 
 i. If test third time T 3  minus T 2  is less than DD, then continue step h: and  
 ii. If test third time T 3  minus T 2  is not less than DD, then proceed to step j;  
   j. Obtain a period value, DDExtra, by subtracting T 2  and DD from T 3  as used in step i.ii;    k. Set T 1  equal to T 3  as used in step i.ii; and    l. Go to step b.    
   
   
       3 . A process for limiting performance of a processor to a selected submodel capability comprising the steps of: 
 a. Sample a Real Time Clock(RTC) to obtain a first time value T 1 ;    b. Reset an Instruction Count(Icnt) counter;    c. Determine if a current instruction to be process is a “wait-type ” having an externally-terminable internal wait; 
 i. If the current instruction is not a “wait-type”, proceed to step d; and  
 ii. If the current instruction is a “wait-type”, go to step f.  
   d. Process instruction while incrementing the Icnt Counter to reflect the processing of each instruction;    e. Compare the counter in the Icnt Counter to a predetermined count Instruction Count Maximum(IcntMax); and 
 i. If the count in the Icnt Counter is less than IcntMax, then return to step d; and  
 ii. If the count in said Icnt Counter is at least IcntMax, then proceed to step f;  
   f. Sample the RTC to obtain a second time T 2 ;    g. Subtract T 1  from T 2  to obtain a time difference DT;    h. Multiply DT by ((1−1/DF)−1) to obtain a Degradation Delay DD period. Degradation Factor DF being a constant having a value which is the desired Submodel performance with respect to full performance;    i. Delay;    j. During step i, 
 i. Determine if the current instuction is a “wait-type”;  
 ii. If the Current instruction is not a wait “type”, go to step j.iv;  
 iii. If the current instruction is a i “wait-type”, determine if the current instruction internal wait is done 
   1 . if the current instruction internal wait is not done, go to step jv.iv; and  
   2 . If the current internal wait is done, go to step k.  
 
 iv. sample the RTC to obtain a test third time T 3 ;  
 v. If test third T 3  minus T 2  is less than DD, then continue step i; and  
 vi. If test third time T 3  minus T 2  is not less than DD, then proceed to step k;  
   k. Set T 1  equal to T 3  as used in step i.ii; and    Go to step b.    
   
   
       4 . (canceled)  
   
   
       5 . The process of  claim 1  in which the value of IcntMax is at least 100.  
   
   
       6 . The process of  claim 2  in which the value of IcntMax is at least 100.  
   
   
       7 . The process of  claim 3  in which the value of IcntMax is at least 100.  
   
   
       8 . (canceled)