US2007148853A1PendingUtilityA1

Novel masked nitrogen enhanced gate oxide

Individually held — no corporate assignee on recordPriority: Aug 17, 2000Filed: Feb 26, 2007Published: Jun 28, 2007
Est. expiryAug 17, 2020(expired)· nominal 20-yr term from priority
H10P 32/20H10P 14/662H10D 64/01344H10D 64/693H10D 30/60H10D 84/0181H10D 84/0144H10D 84/038
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Claims

Abstract

A method for fabricating improved integrated circuit devices. The method enables selective hardening of gate oxide layers and includes providing a semiconductor substrate having a gate oxide layer formed thereover. A resist is then formed over the gate oxide layer and patterned to expose one or more areas of the gate oxide layer which are to be hardened. The exposed portions of the gate oxide layer are then hardened using a true remote plasma nitridation (RPN) scheme or a high-density plasma (HDP) RPN scheme. Because the RPN scheme used in the method of the present invention runs at low temperature, the patterned resist remains stable through the RPN process, and those areas of gate oxide layer which are exposed by the patterned resist are selectively hardened by the RPN treatment, while those areas covered by the patterned resist remain unaffected.

Claims

exact text as granted — not AI-modified
1 . A method that eliminates an etching process in the manufacture of a semiconductor device having a substrate having an oxide layer thereon comprising: 
 forming a resist over at least a portion of said oxide layer;    patterning said resist to create at least one exposed area of said oxide layer;    hardening said at least one exposed area of said oxide layer using a remote plasma nitrogen hardening treatment;    forming a second resist over at least a portion of said oxide layer;    patterning said second resist to create at least one exposed area of said oxide layer; and    conducting a second remote plasma nitrogen hardening treatment to create at least one second hardened area and at least one non-hardened area within said oxide layer.    
   
   
       2 . The method of  claim 1 , wherein the substrate comprises a silicon substrate.  
   
   
       3 . The method of  claim 2 , wherein forming the oxide layer over at least a portion of the substrate comprises thermally growing an oxide layer.  
   
   
       4 . The method of  claim 1 , wherein hardening the at least one exposed area of the oxide layer using the remote plasma nitrogen hardening treatment comprises using a high-density plasma remote plasma nitrogen hardening treatment.  
   
   
       5 . The method of  claim 4 , wherein using the high-density plasma remote plasma nitrogen hardening treatment comprises using a process run in a range of approximately 1 second to approximately 30 seconds at a temperature of between about 30° C. and about 90° C. using about 800 watts to 3000 watts of power.  
   
   
       6 . The method of  claim 1 , wherein forming the oxide layer over the at least a portion of the substrate comprises forming an oxide layer having a thickness of about 30 Angstroms to about 50 Angstroms.  
   
   
       7 . The method of  claim 1 , wherein patterning the resist to create the at least one exposed area of the oxide layer comprises patterning the resist to create a plurality of exposed areas of the oxide layer.  
   
   
       8 . A method for forming gate oxide layers having varying thicknesses without the use of etching in the manufacture of a semiconductor device having a substrate having an oxide layer thereon comprising: 
 forming a resist over at least a portion of said oxide layer;    patterning said resist to create at least one exposed area of said oxide layer;    hardening said at least one exposed area of said oxide layer using a remote plasma nitrogen hardening treatment;    forming a second resist over at least a portion of said oxide layer;    patterning said second resist to create at least one exposed area of said oxide layer; and    conducting a second remote plasma nitrogen hardening treatment to create at least one second hardened area and at least one non-hardened area within said oxide layer.    
   
   
       9 . The method of  claim 8 , wherein the substrate comprises a silicon substrate.  
   
   
       10 . The method of  claim 9 , wherein forming the oxide layer over at least a portion of the substrate comprises thermally growing an oxide layer.  
   
   
       11 . The method of  claim 8 , wherein hardening the at least one exposed area of the oxide layer using the remote plasma nitrogen hardening treatment comprises using a high-density plasma remote plasma nitrogen hardening treatment.  
   
   
       12 . The method of  claim 11 , wherein using the high-density plasma remote plasma nitrogen hardening treatment comprises using a process run in a range of approximately 1 second to approximately 30 seconds at a temperature of between about 30° C. and about 90° C. using about 800 watts to 3000 watts of power.  
   
   
       13 . The method of  claim 8 , wherein forming the oxide layer over the at least a portion of the substrate comprises forming an oxide layer having a thickness of about 30 Angstroms to about 50 Angstroms.  
   
   
       14 . The method of  claim 8 , wherein patterning the resist to create the at least one exposed area of the oxide layer comprises patterning the resist to create a plurality of exposed areas of the oxide layer.  
   
   
       15 . A method for forming gate oxide layers having varying thicknesses without the use of etching for N-channel devices in the manufacture of an integrated circuit located on a portion of a substrate having an oxide layer thereon comprising: 
 forming a resist over at least a portion of said oxide layer;    patterning said resist to create at least one exposed area of said oxide layer;    hardening said at least one exposed area of said oxide layer using a remote plasma nitrogen hardening treatment;    forming a second resist over at least a portion of said oxide layer;    patterning said second resist to create at least one exposed area of said oxide layer; and    conducting a second remote plasma nitrogen hardening treatment to create at least one second hardened area and at least one non-hardened area within said oxide layer.    
   
   
       16 . The method of  claim 15 , wherein the substrate comprises a silicon substrate.  
   
   
       17 . The method of  claim 16 , wherein forming the oxide layer over at least a portion of the substrate comprises thermally growing an oxide layer.  
   
   
       18 . The method of  claim 15 , wherein hardening the at least one exposed area of the oxide layer using the remote plasma nitrogen hardening treatment comprises using a high-density plasma remote plasma nitrogen hardening treatment.  
   
   
       19 . The method of  claim 18 , wherein using the high-density plasma remote plasma nitrogen hardening treatment comprises using a process run in a range of approximately 1 second to approximately 30 seconds at a temperature of between about 30° C. and about 90° C. using about 800 watts to 3000 watts of power.  
   
   
       20 . The method of  claim 15 , wherein forming the oxide layer over the at least a portion of the substrate comprises forming an oxide layer having a thickness of about 30 Angstroms to about 50 Angstroms.

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