US2007148821A1PendingUtilityA1
Thermally enhanced stacked die package and fabrication method
Est. expiryApr 16, 2024(expired)· nominal 20-yr term from priority
H10W 90/754H10W 90/291H10W 90/288H10W 90/22H10W 72/884H10W 90/00
48
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Claims
Abstract
A substrate is provided. A first die is attached to the substrate. The first die is electrically connected to the substrate. A heat sink having an undercut around its periphery is attached to the first die. A second die is attached to the heat sink. The second die is electrically connected to the substrate, and the first die, the heat sink, and the second die are encapsulated.
Claims
exact text as granted — not AI-modified1 . A method of assembling a semiconductor package with stacked dies comprising:
providing a substrate; attaching a first die to the substrate; electrically connecting the first die to the substrate; attaching a heat sink having an undercut around its periphery overhanging bond pads over the first die; attaching a second die to the heat sink; electrically connecting the second die to the substrate; and encapsulating the first die, the heat sink, and the second die.
2 . The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein:
electrically connecting the first die to the substrate uses a number of bonding wires; and attaching a heat sink attaches a heat sink that extends laterally over the number of bonding wires.
3 . The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein attaching a heat sink attaches a heat sink that is electrically grounded.
4 . The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein attaching a heat sink attaches a heat sink that has an electrically conductive coating, further comprising:
connecting the second die to the electrically conductive coating; and connecting the electrically conductive coating to a ground plane.
5 . The method of assembling a semiconductor package with stacked dies as claimed in claim 1 wherein attaching a heat sink attaches a heat sink that extends laterally beyond the edges of the second die.
6 . A method of thermally enhancing a semiconductor package with a stack of dies comprising providing a heat sink having an undercut around its periphery between dies in the stack.
7 . The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein:
providing a heat sink attaches a heat sink that extends laterally over the lower die to which the heat sink is attached.
8 . The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein providing a heat sink attaches a heat sink that is electrically grounded.
9 . The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein providing a heat sink attaches a heat sink that has an electrically conductive coating, further comprising:
connecting one of the dies in the stack of dies to the electrically conductive coating; and connecting the electrically conductive coating to a ground plane.
10 . The method of thermally enhancing a semiconductor package with a stack of dies as claimed in claim 6 wherein providing a heat sink attaches a heat sink between each adjoining pair of dies in the stack of dies.
11 . A semiconductor package with stacked dies comprising:
a substrate; a first die attached to the substrate; the first die being electrically connected to the substrate; a heat sink having an undercut around its periphery attached to the first die; a second die attached to the heat sink and electrically connected to the substrate; and an encapsulant over the first die, the heat sink, and the second die.
12 . The semiconductor package with stacked dies as claimed in claim 11 further comprising:
a number of bonding wires electrically connecting the first die to the substrate; and wherein: the undercut of the heat sink extends laterally over the number of bonding wires.
13 . The semiconductor package with stacked dies as claimed in claim 11 wherein the heat sink is electrically grounded.
14 . The semiconductor package with stacked dies as claimed in claim 11 wherein:
the heat sink has an electrically conductive coating connected to a ground plane on the substrate; and the second die is connected to the electrically conductive coating.
15 . The semiconductor package with stacked dies as claimed in claim 11 wherein the undercut of the heat sink extends laterally beyond the edges of the second die.
16 . A thermally enhanced semiconductor package with a stack of dies comprising a heat sink having an undercut around its periphery between dies in the stack.
17 . The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein:
the undercut of the heat sink extends laterally over the die to which the heat sink is attached.
18 . The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein the heat sink is electrically grounded.
19 . The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein:
the heat sink has an electrically conductive coating; one of the dies in the stack of dies is connected to the electrically conductive coating; and the electrically conductive coating is connected to a ground plane.
20 . The thermally enhanced semiconductor package with a stack of dies as claimed in claim 16 wherein a heat sink is positioned between each adjoining pair of dies in the stack of dies.Join the waitlist — get patent alerts
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