Apparatus and method for increasing the quantity of discrete electronic components in an integrated circuit package

Abstract

An apparatus and method for incorporating discrete passive components into an integrated circuit package. A first surface of a substrate is coated with a material to mechanically protect the first surface. A first metal layer and then an insulating layer are formed on a second surface of the substrate. Selected areas are removed from the insulating and a second metal layer is formed over the insulating layer and the exposed metal layer. Selected areas of the second metal layer are removed to form a plurality of structures, including at least one of a wirebonding pad, a solder-bonding pad, a device interconnect circuit, or an attach pad to which an electronic component may be attached. An electronic component may be attached to at least one of the structures. The resulting integrated circuit die may be incorporated into an electronic package.

1 . A method of fabrication comprising: 
 a) providing a substrate with a first surface having a passivation layer; and    b) building a plurality of structures on a second surface of the substrate, the plurality of structures including at least one structure to which an electronic component may be attached, the plurality of structures including at least one of the following: 
 i) a wirebonding pad;  
 ii) a solder-bonding pad;  
 iii) a device interconnect circuit; or  
 iv) an attach pad to which an electronic component can be attached.  
   
   
   
       2 . The method of  claim 1  wherein building the plurality of structures includes forming a metal layer on the second surface of the substrate.  
   
   
       3 . The method of  claim 2  wherein building the plurality of structures includes forming an insulating layer on the metal layer.  
   
   
       4 . The method of  claim 3  wherein building the plurality of structures includes removing selected areas of the insulating layer, thereby exposing portions of the first metal layer.  
   
   
       5 . The method of  claim 4  wherein building the plurality of structures includes forming a second metal layer over the insulating layer and the exposed portions of the first metal layer.  
   
   
       6 . The method of  claim 5  wherein building the plurality of structures includes removing selected areas of the second metal layer to form the plurality of structures.  
   
   
       7 . The method of  claim 1  further comprising attaching the substrate to an electronic package.  
   
   
       8 . The method of  claim 7  wherein the package is a multi-chip module package.  
   
   
       9 . The method of  claim 1  further comprising coating the first surface with a material to mechanically protect the first surface.  
   
   
       10 . The method of  claim 1  further comprising attaching the electronic component to the attach pad.  
   
   
       11 . The method of  claim 10  wherein the electronic component is either an active or passive component.  
   
   
       12 . The method of  claim 1  wherein the substrate is a semiconductor substrate.  
   
   
       13 . The method of  claim 1  wherein the second surface is silicon or gallium arsenide.  
   
   
       14 . An electronic package comprising: 
 a) a substrate;    b) an integrated circuit die coupled to a first surface of the substrate, a first surface of the integrated circuit die having a means for coupling to the first surface of the substrate, at least one first electronic component attached to the first surface of the integrated circuit die, at least one structure attached to a second surface of the integrated circuit die, the at least one structure configured to be coupled to a second electronic component.    
   
   
       15 . The electronic package of  claim 14  wherein the at least one structure attached to the second surface includes at least one of the following: 
 a) a wirebonding pad;    b) a solder-bonding pad;    c) a device interconnect circuit; or    d) an attach pad to which the second electronic component may be coupled.    
   
   
       16 . The electronic package of  claim 15  further comprising the second electronic component attached to the at least one structure.  
   
   
       17 . The electronic package of  claim 16  further comprising the second electronic component coupled to the substrate.  
   
   
       18 . The electronic package of  claim 17  wherein the second electronic component is coupled to the substrate by a wirebond.  
   
   
       19 . The electronic package of  claim 16  wherein the second electronic component is either an active or passive component.  
   
   
       20 . The electronic package of  claim 14  wherein the electronic package is a multi-chip module package.  
   
   
       21 . The electronic package of  claim 14  wherein the substrate is a printed circuit board.  
   
   
       22 . An electronic package comprising: 
 a) a substrate;    b) a flip chip attached to a first surface of the substrate, a first surface of the flip chip having a means for attachment to the first surface of the substrate, at least one first electronic component attached to the first surface of the flip chip, at least one structure attached to a second surface of the flip chip, the at least one structure configured to be coupled to a second electronic component.    
   
   
       23 . The electronic package of  claim 14  wherein the at least one structure attached to the second surface includes at least one of the following: 
 a) a wirebonding pad;    b) a solder-bonding pad;    c) a device interconnect circuit; or    d) an attach pad to which the second electronic component may be coupled.    
   
   
       24 . The electronic package of  claim 23  further comprising a second electronic component attached to the at least one structure.  
   
   
       25 . The electronic package of  claim 23  wherein the second electronic component is either an active or passive component.  
   
   
       26 . The electronic package of  claim 22  wherein the electronic package is a multi-chip module package.  
   
   
       27 . The electronic package of  claim 22  wherein the substrate is a printed circuit board.  
   
   
       28 . A semiconductor device comprising: 
 a) a first substrate having a first surface and a second surface;    b) a passivation layer on the first surface of the first substrate; and    c) at least one structure attached to the second surface of the first substrate, the at least one structure configured to be coupled to an electronic component.    
   
   
       29 . The semiconductor device of  claim 28  wherein the at least one structure includes at least one of the following: 
 a) a wirebonding pad;    b) a solder-bonding pad;    c) a device interconnect circuit; or    d) an attach pad to which the electronic component may be attached.    
   
   
       30 . The semiconductor device of  claim 28  further comprising a means for attachment to a second substrate, the means for attachment coupled to the first surface of first substrate.  
   
   
       31 . The semiconductor device of  claim 30  wherein the second substrate is attached to an electronic package.  
   
   
       32 . The semiconductor device of  claim 30  further comprising at least one electronic component attached to the at least one structure.  
   
   
       33 . The semiconductor device of  claim 28  wherein the first substrate is a semiconductor substrate.  
   
   
       34 . The semiconductor device of  claim 28  wherein the semiconductor substrate is silicon or gallium arsenside.  
   
   
       35 . The semiconductor device of  claim 32  wherein the at least one electronic component is an active or passive component.  
   
   
       36 . The semiconductor device of  claim 30  wherein the second substrate is a semiconductor substrate.  
   
   
       37 . A method of integrated circuit device packaging comprising: 
 a) providing a substrate;    b) coupling a first surface of an integrated circuit die to the substrate, the first surface coupled to at least one electronic component; and    c) attaching at least one electronic component to at least one structure on a second surface of the integrated circuit die.    
   
   
       38 . The method of  claim 37  wherein the first surface of the integrated circuit die is coupled to the substrate by solder balls.  
   
   
       39 . The method of  claim 37  wherein the first surface of the integrated circuit die is coupled to the substrate by wirebond.  
   
   
       40 . The method of  claim 37  further comprising coupling the at least one electronic component to the substrate.  
   
   
       41 . The method of  claim 37  wherein the at least one electronic component is coupled to the substrate by a wirebond.  
   
   
       42 . The method of  claim 37  wherein the electronic component is either an active or passive component.  
   
   
       43 . The method of  claim 37  wherein the substrate is a printed circuit board.