US2007138541A1PendingUtilityA1

Method of erasing data from SONOS memory device

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Jun 16, 2003Filed: Feb 5, 2007Published: Jun 21, 2007
Est. expiryJun 16, 2023(expired)· nominal 20-yr term from priority
H10D 30/0413H10D 30/69H10B 43/30G11C 16/0466
47
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Claims

Abstract

A SONOS memory device, and a method of erasing data from the same, includes injecting charge carriers of a second sign into a trapping film, which traps charge carriers of a first sign to store data therein. The charge carriers of the second sign are generated by an electric field formed between one of a first and second electrodes contacting at least one bit line and a gate electrode contacting a word line. A blocking film may be provided between the gate electrode and the trapping film. The charge carriers of the second sign may be hot holes. This erasing improves erasing speed, thereby improving performance of the SONOS memory device.

Claims

exact text as granted — not AI-modified
1 - 11 . (canceled)  
   
   
       12 . A method of erasing data a memory device connected to a word line and a bit line, the memory device including a trapping layer in which charge carriers of a first sign are stored and a gate electrode contacting the word line, the method comprising: 
 applying a predetermined voltage of a first polarity to at least one of a first electrode and a second electrode of the memory device contacting the bit line; and    forming an electric field between one of the first and second electrodes and the gate electrode by applying a predetermined voltage of a second polarity, opposite the first polarity, to the gate electrode, thereby enabling charge carriers of a second sign, opposite the first sign, generated by at least one of the first and second electrodes to be injected into the trapping layer.    
   
   
       13 . The method as claimed in  claim 12 , wherein a voltage of the first polarity is applied to one of the first and second electrodes and another of the first and second electrodes is grounded.  
   
   
       14 . The method as claimed in  claim 12 , wherein the bit line includes a first bit line and a second bit line, the first and second bit lines respectively contacting the first and the second electrodes, and a same voltage of the first polarity is applied to the first and second bit lines.  
   
   
       15 . The method as claimed in  claim 12 , further comprising shielding movement of charge carriers between the trapping film and the gate electrode.  
   
   
       16 . The method as claimed in  claim 12 , wherein the first and second electrodes have a channel length of less than 100 nm.  
   
   
       17 . The method as claimed in  claim 12 , wherein the trapping layer is a nitride film.  
   
   
       18 . The method as claimed in  claim 12 , wherein the charge carriers of the second sign are hot holes.  
   
   
       19 - 23 . (canceled)  
   
   
       24 . The method as claimed in  claim 12 , wherein a voltage of a first polarity is applied to each of the first and the second electrodes and a voltage of a second polarity, opposite the first polarity, is applied to the gate electrode.  
   
   
       25 . The method as claimed in  claim 24 , wherein the voltage of the first polarity applied to each of the first and the second electrodes has a same value for both the first and second electrodes.  
   
   
       26 . The method as claimed in  claim 12 , wherein the bit line contacts one of the electrodes such that charge carriers of the second sign from one of the first and the second electrode can be injected into the bit line.  
   
   
       27 . The method as claimed in  claim 12 , wherein the bit line includes a first bit line and a second bit line respectively contacting the first and the second electrodes such that charge carriers of the second sign from the first and second electrodes can be injected into the first and second bit lines.  
   
   
       28 . The method as claimed in  claim 17 , wherein data is recorded by tunneling electrons of a Fowler-Nordheim current into the nitride film across the tunnel oxide layer.  
   
   
       29 . The method as claimed in  claim 28 , wherein a negative voltage is applied to the gate electrode.  
   
   
       30 . The method as claimed in  claim 17 , wherein the data is erased by tunneling the charge carriers of the second sign into the nitride film by a Fowler-Nordheim current flowing across the tunnel oxide layer.

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