Circuit and method for modifying a region of an encoded image
Abstract
A video processing circuit includes a processor that receives an encoded image having first and second regions, decodes the first region of the image, modifies the decoded first region, and re-encodes the modified first region. Such a circuit allows one to modify a region of an image by decoding and re-encoding only that region instead of the entire image. For example, if one wishes to overlay an EPG on a bottom portion of a video frame, then the circuit can decode only the EPG and the bottom portion of the frame, overlay the decoded EPG on the bottom frame portion, and re-encode the overlaid bottom frame portion. Therefore, this technique often reduces the processing time, and thus the cost and complexity of the processing circuit, as compared to a circuit that decodes and re-encode the entire frame during an image overlay process.
Claims
exact text as granted — not AI-modified1 . A video processing circuit comprising a processor operable to:
receive an encoded base image having first and second regions and an encoded overlay image; decode the overlay image and the first region of the base image; combine the decoded overlay image with the decoded first region of the base image to form a modified first region of the base image; and re-encode the modified first region of the base image.
2 . The video processing circuit of claim 1 where the processor is operable to combine the encoded second region of the base image and the re-encoded modified first region of the base image to generate an encoded modified base image.
3 . The video processing circuit of claim 1 where the processor is operable to:
decode the overlay image and the first region of the base image into a transform domain; and combine the decoded overlay image with the decoded first region of the base image in the transform domain.
4 . The video processing circuit of claim 1 where the processor is operable to:
decode the overlay image and the first region of the base image into a pixel domain; and combine the decoded overlay image with the decoded first region of the base image in the pixel domain.
5 . The video processing circuit of claim 1 where the overlay image comprises a program guide.
6 . The video processing circuit of claim 1 comprising:
a buffer; and where the processor is operable to store the encoded second region of the base image and the re-encoded modified first region of the base image in the buffer as an encoded modified base image.
7 . A video processing circuit, comprising:
a display output; a processor operable to receive an encoded base image having first and second regions, an encoded overlay image, and an overlay signal, the processor being coupled to the display output; where the processor, responsive to the overlay signal, is operable to:
decode the overlay image and the first region of the base image;
combine the decoded overlay image with the decoded first region of the base image to form a modified first region of the base image;
re-encode the modified first region of the base image;
combine the encoded second region of the base image and the re-encoded modified first region of the base image to form an encoded modified base image; and
provide the encoded modified base image on the display output; and
provide the encoded base image on the display output in the absence of the overlay signal.
8 . The video processing circuit of claim 7 where the overlay image comprises a program guide.
9 . The video processing circuit of claim 7 where the overlay signal comprises a remote-control overlay signal.
10 . The video processing circuit of claim 7 comprising:
a buffer; and where the processor is operable to combine the encoded second region of the base image and the re-encoded modified first region of the base image by storing the encoded second region and the re-encoded modified first region in the buffer.
11 . A video processing circuit, comprising a processor operable to:
receive encoded images each having respective first and second regions, each of the first and second regions divided into respective image subregions; decode at least one of the image subregions in the first region of an image; modify the decoded image subregion; and re-encode the modified image subregion.
12 . The video processing circuit of claim 11 where the processor is operable to re-encode the modified image subregion as an intracoded subregion.
13 . The video processing circuit of claim 11 where the processor is operable to re-encode the modified image subregion as non-intracoded subregion having a motion vector with a location value of zero.
14 . The video processing circuit of claim 11 where the processor is operable to:
receive an overlay image divided into overlay subregions; decode at least one of the overlay subregions; modify the decoded image subregion by combining the decoded image subregion with the decoded overlay subregion to form the modified image subregion; and re-encode the modified image subregion by intra-coding the modified image subregion.
15 . The video processing circuit of claim 11 where the processor is operable to:
receive an overlay image divided into overlay subregions; decode at least one of the overlay subregions; modify the decoded image subregion by combining the decoded image subregion with the decoded overlay subregion to form the modified image subregion; and re-encode the modified image subregion as a non-intra-coded subregion having a motion vector with a location value of zero.
16 . The video processing circuit of claim 11 where the processor is operable to:
receive overlay images divided into respective overlay subregions, the overlay images having a scroll rate; decode at least one of the overlay subregions; modify the decoded image subregion by combining L the decoded image subregion with the decoded overlay subregion to form the modified image subregions; and re-encode the modified image subregion as non-intra-coded subregion having a motion vector with a value based on the scroll rate.
17 . The video processing circuit of claim 11 where the image subregions each comprise a respective macro block.
18 . A video processing circuit, comprising:
a display output; a processor coupled to the display output and operable to:
receive a sequence of encoded images each having respective first and second regions, the sequence including intra-coded and non-intra-coded images;
decode the first region of an intra-coded image;
modify the decoded first region;
re-encode the modified first region;
combine the encoded second region of the intra-coded image and the reencoded modified first region of the intra-coded image to form an encoded modified intra-coded image; and
provide the encoded modified intra-coded image on the display output.
19 . The video processing circuit of claim 18 where the processor is operable to uncouple the respective first and second regions of the nonintra-coded images from the display output.
20 . The video processing circuit of claim 18 where the processor is operable to uncouple the respective second regions of the non-intracoded images from the display output.
21 . The video processing circuit of claim 18 where the processor is operable to:
decode the first region of a non-intra-coded image; modify the decoded first region of the non-intra-coded image; re-encode the modified first region of the non-intra-coded image; combine the encoded second region of the intra-coded image and the reencoded modified first region of the non-intra-coded image to form an encoded modified image; and provide the encoded modified image on the display output.
22 . A method, comprising:
decoding an encoded overlay image and a first region of an encoded base image having the first region and a second region; combining the decoded overlay image with the decoded first region of the base image to form a blended first region of the base image; and re-encoding the blended first region of the base image.
23 . The method of claim 22 comprising:
combining the encoded second region of the base image and the re-encoded first region of the base image to form an encoded modified base image.
24 . The method of claim 22 where:
the decoding comprises decoding the overlay image and the first region of the base image into a transform domain; and the combining comprises combining the decoded overlay image and the decoded first region in the transform domain.
25 . The method of claim 22 where:
the decoding comprises decoding the overlay image and the first region of the base image into a pixel domain; and the combining comprises combining the decoded overlay image and the decoded first region in the transform domain.
26 . The method of claim 22 where the overlay image comprises a program guide.
27 . A method, comprising:
decoding at least one image subregion in a first region of an encoded image having the first region and a second region divided into respective image subregions; modifying the decoded image subregion; and re-encoding the modified image subregion.
28 . The method of claim 27 comprising:
receiving an overlay image divided into respective overlay subregions; decoding at least one of the overlay subregions; where the modifying comprises combining the decoded image subregion with the decoded overlay subregion to form the modified image subregion; and where the re-encoding comprises intra coding the modified image subregion.
29 . The method of claim 27 comprising:
receiving an overlay image divided into respective overlay subregions; decoding at least one of the overlay subregions; where the modifying comprises combining the decoded image subregion with the decoded overlay subregion to form the modified image subregion; and where the re-encoding comprises non-intra coding and generating a motion vector for the modified image subregion, the motion vector having a location value of zero.
30 . The method of claim 27 comprising:
receiving an overlay image divided into respective overlay subregions, the overlay images having a scroll rate; decoding at least one of the overlay subregions; where the modifying comprises combining the decoded image subregion with the decoded overlay subregion to form the modified image subregion; and where the re-encoding comprises non-intra coding and generating a motion vector for the modified image subregion, the motion vector having a location value based on the scroll rate.
31 . A method. comprising:
receiving an encoded image having first and second regions; decoding the first and second regions; changing the resolution of the first and second regions; modifying the first region after changing its resolution; and re-encoding the modified first region.
32 . The method of claim 31 where the changing comprises reducing the resolution of the first and second regions.
33 . The method of claim 31 comprising combining the encoded second region of the image and the re-encoded first region of the image to generate an encoded modified image.
34 . The method of claim 31 where the changing comprises changing the resolution of the first and second regions in the transform domain.
35 . A method, comprising:
receiving an encoded base image and an encoded overlay image; decoding the base image and the overlay image; and combining the decoded base image and the decoded overlay image in the transform domain to form a modified image.
36 . The method of claim 35 comprising re-encoding the modified image.
37 . The method of claim 35 where the combining comprises alpha blending the decoded base image and the decoded overlay image.Join the waitlist — get patent alerts
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