Semiconductor chip mounted interposer, semiconductor device, semiconductor chip interposer fabrication method, bare chip mounted interposer, and interposer sheet

Abstract

A semiconductor chip mounted interposer ( 60 ) is configured by executing wire bonding between a semiconductor chip ( 50 ) and an interposer ( 20 ), in which terminals ( 21 ) that connect to terminals ( 51 ) of the chip ( 50 ) and separate terminals ( 22 ) are formed, on the upper face of the interposer ( 20 ). A semiconductor chip ( 30 ) is mounted to the top face of a package substrate ( 10 ), the interposer ( 60 ) is adhered to the upper portion of the chip ( 30 ), and wire bonding is executed between the terminals ( 22 ) and terminals ( 11 ′). When configuring a semiconductor device with a plurality of semiconductor chips combined into one package in this manner, KGD (Known-Good-Die) can easily be guaranteed for each semiconductor chip, and semiconductor devices can be fabricated with a high yield of good units. Also, the semiconductor chips can be used as-is, without restricting the position, pitch, signal arrangement, or the like, of their terminals.

1 . A semiconductor device comprising: 
 a substrate-like or frame-like base material on which a plurality of semiconductor chips are mounted, wherein    a semiconductor chip mounted interposer configured by mounting a semiconductor bare chip on an interposer in which inside terminals to which terminals of the mounted semiconductor bare chip are connected, outside terminals to which terminals other than the terminals of the semiconductor bare chip are connected, testing terminals to which testing electrodes of a testing apparatus are connected, and conductive wiring that makes an electrical connection between the inside terminals, the outside terminals and the testing terminals, are formed, and detaching the testing terminals after predetermined reliability testing or operation testing wherein    the semiconductor chip mounted interposer is mounted along with another semiconductor chip to the base material, and the semiconductor chip mounted interposer and the other semiconductor chip are resin sealed along with the base material.    
     
     
         2 - 6 . (canceled)  
     
     
         7 . A semiconductor chip mounted interposer, configured by mounting a semiconductor bare chip on an interposer in which inside terminals to which terminals of the mounted semiconductor bare chip are connected, outside terminals to which terminals other than the terminals of the semiconductor bare chip are connected, testing terminals to which testing electrodes of a testing apparatus are connected, and conductive wiring that makes an electrical connection between the inside terminals, the outside terminals and the testing terminals, are formed, and 
 detaching the testing terminals after predetermined reliability testing or operation testing.    
     
     
         8 . A fabrication method for a semiconductor chip mounted interposer, comprising: 
 producing an interposer in which inside terminals to which terminals of the mounted semiconductor bare chip are connected, outside terminals to which terminals other than the terminals of the semiconductor bare chip are connected, testing terminals to which testing electrodes of a testing apparatus are connected, and conductive wiring that makes an electrical connection between the inside terminals, the outside terminals and the testing terminals, are formed,    mounting the semiconductor bare chip on the interposer, and connecting terminals of the semiconductor bare chip to the inside terminals,    performing predetermined reliability testing or operation testing by connecting a testing apparatus to the testing terminals, and    producing a semiconductor chip mounted interposer by detaching the testing terminals after the predetermined reliability testing or operation testing.    
     
     
         9 . (canceled)  
     
     
         10 . The fabrication method for a semiconductor chip mounted interposer according to  claim 8 , wherein the production of the interposer is performed by joining a plurality of interposers in a single body in the form of a matrix, and 
 the operation testing is performed by consecutively or simultaneously performing the initial reliability testing or operation testing for the plurality of interposers joined in a single body.    
     
     
         11 . A bare chip mounted interposer, in which: 
 inside terminals to which terminals of a mounted semiconductor bare chip are connected,    outside terminals to which terminals other than the terminals of the semiconductor bare chip are connected,    testing terminals for connecting testing electrodes of a testing apparatus, formed on the outer side of the inside terminals and the outside terminals, with a larger pitch than the inside terminals and the outside terminals, and    conductive wiring that makes an electrical connection between the outside terminals, the inside terminals, and the testing terminals, are formed.    
     
     
         12 . An interposer sheet configured by joining a plurality of the interposers according to  claim 11  in a single body in the form of a matrix.