Method of fabricating electrical connection terminal of embedded chip

Abstract

An electrical connection terminal of an embedded chip and a method for fabricating the same are proposed. Firstly, an insulating layer is provided on a circuit board integrated with a chip and is produced a plurality of first openings on the circuit board, wherein at least one of the first openings corresponds to a position of a conductive pad of the chip to expose the conductive pad. Then, a first metal layer is formed on the conductive pad and a conductive layer is formed on the surface of the first metal layer, insulating layer and the first openings. A patterned resist layer having a plurality of second openings is formed on the conductive layer to expose a part of the conductive layer to be subsequently deposited with a second metal layer, wherein at least one of the second openings of the resist layer is located correspondingly to the conductive pad. Subsequently, the second metal layer is formed on the exposed part of the conductive layer by an electroplating process. By such arrangement, the fabrication of the conductive structure of the conductive pad of the chip and build-up of conductive circuits on the circuit board can be simultaneously integrated to simplify processes and costs of the fabrication.

1 .- 9 . (canceled)  
     
     
         10 . An electrical connection terminal of an embedded chip, which comprises: 
 a conductive pad;    a zincified treatment layer formed on the conductive pad;    nickel layer deposited on the conductive pad, for effectively adhering the nickel layer on the conductive pad with the zincified treatment layer;    a conductive layer deposited on the nickel layer; and    a metal layer formed on the conductive layer by an electroplating process.    
     
     
         11 . The electrical connection terminal of the embedded chip of  claim 10 , wherein the chip is embedded into a circuit board after a wafer is completed with a wafer integrated circuit process and singulated to form a plurality of chip units by a singulation process.  
     
     
         12 . The electrical connection terminal of the embedded chip of  claim 10 , wherein the metal layer formed on the conductive layer is a copper metal layer.  
     
     
         13 . The electrical connection terminal of the embedded chip of  claim 10 , wherein the conductive layer is made of a material selected from a group consisting of copper (Cu), tin (Sn), nickel (Ni), chromium (Cr), titanium (Ti), Cu/Cr alloy, Sn/Pb alloy, or a conductive polymer.  
     
     
         14 .- 16 . (canceled)  
     
     
         17 . The electrical connection terminal of the embedded chip of  claim 11 , wherein the circuit board is formed with an insulating layer having an opening corresponding to a position of the conductive pad of the chip.  
     
     
         18 . The electrical connection terminal of the embedded chip of  claim 17 , wherein the insulating layer is made of a material selected from a group consisting of non-fibrous resin-typed materials and fibrous impregnant resin materials.  
     
     
         19 . The electrical connection terminal of the embedded chip of  claim 17 , wherein the insulating layer is made of photo-sensitive insulating materials.