US2007125833A1PendingUtilityA1
Method for improved high current component interconnections
Individually held — no corporate assignee on recordPriority: Apr 30, 2003Filed: Jan 23, 2007Published: Jun 7, 2007
Est. expiryApr 30, 2023(expired)· nominal 20-yr term from priority
H05K 3/3485H05K 3/3478H05K 2203/1476H05K 3/3452H05K 2203/0557H05K 3/3436H05K 1/0263Y02P70/50H05K 2203/041
52
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Claims
Abstract
A printed circuit board having at least one conductive region covered in solder paste has preformed solder elements placed on the solder paste in the conductive region. A component package is placed onto the printed circuit board over the conductive region and the solder is reflowed, forming a wide solder interconnection between the component and the conductive region of the printed circuit board.
Claims
exact text as granted — not AI-modified1 . A method of forming a solder interconnection, comprising:
placing a plurality of preformed solder elements onto at least one region of solder paste on a printed circuit board; placing a component package onto the printed circuit board, wherein the component package contains a plurality of solder balls, at least some of which are placed in the at least one region of solder paste; and reflowing the plurality of preformed solder elements and the component solder balls to form a connection between the component and the printed circuit board.
2 . The method of claim 1 , wherein the plurality of preformed solder elements are spherical solder balls.
3 . The method of claim 1 , wherein the plurality of preformed solder elements are rectangular in shape.
4 . The method of claim 1 , wherein each of the plurality of preformed solder elements is located interstitial to at least some of the plurality of component package solder balls.
5 . The method of claim 1 , further comprising applying a solder mask to the printed circuit board, wherein the solder mask is applied to areas of the printed circuit board where solder is not desired.
6 . A method of forming a solder interconnection, comprising:
applying a solder mask to a printed circuit board; applying a layer of solder paste to the printed circuit board using a first stencil; placing a plurality of bonus solder balls onto the layer of solder paste using a second stencil; placing a component package onto the printed circuit board, wherein the component package contains solder balls which are placed in the solder paste and the plurality of bonus solder balls lie between the component package solder balls, the component package solder balls having interstices; and reflowing the plurality of bonus solder balls and the component solder balls to form a connection between the component and the printed circuit board.
7 . The method of claim 6 , wherein a spacer is placed between the second stencil and the printed circuit board.
8 . The method of claim 6 , wherein the second stencil contains a plurality of openings corresponding to an area on the component where additional solder volume is desired.
9 . The method of claim 8 , wherein the second stencil contains a plurality of openings over an area on the printed circuit board containing a conductive plane.
10 . The method of claim 9 , wherein each of the plurality of openings corresponds to one of the interstices of the component package solder balls.
11 . The method of claim 8 , wherein the placing of the plurality of bonus solder balls onto the solder paste is performed by rolling the plurality of bonus solder balls onto the top of the second stencil and using a squeegee to push the plurality of bonus solder balls along the surface of the second stencil until each of the plurality of bonus solder balls drops through one of the plurality of openings in the second stencil into the solder paste.
12 . The method of claim 8 , wherein the placing of the plurality of bonus solder balls onto the solder paste is performed by placing the plurality of bonus solder balls onto the top of the second stencil and shaking until each of the plurality of bonus solder balls drops through one of the plurality of openings in the second stencil into the solder paste.
13 . The method of claim 6 , wherein the component is a standard, off-the-shelf component.
14 . The method of claim 13 , wherein the component package is fully populated with solder balls.
15 . The method of claim 14 , wherein the component solder balls are consistently spaced.
16 . A method of forming a solder interconnection, comprising:
applying a solder mask to a printed circuit board; applying a layer of solder paste to a printed circuit board using a first stencil; placing a plurality of solder balls onto the solder paste using a second stencil; placing a component onto the printed circuit board, wherein the component is placed onto the solder paste and onto the plurality of solder balls; and reflowing the plurality of solder balls to form a connection between the component and the printed circuit board.
17 . The method of claim 16 , wherein a spacer is placed between the second stencil and the printed circuit board.
18 . The method of claim 16 , wherein the second stencil contains a plurality of openings.
19 . The method of claim 18 , wherein the placing of the plurality of solder balls onto the solder paste is performed by placing the plurality of solder balls onto the top of the second stencil and using a squeegee to push the plurality of solder balls along the surface of the second stencil until each of the plurality of solder balls drops through one of the plurality of openings in the second stencil into the solder paste.
20 . The method of claim 18 , wherein the placing of the plurality of solder balls onto the solder paste is performed by placing the plurality of solder balls onto the top of the second stencil and shaking until each of the plurality of solder balls drops through one of the plurality of openings in the second stencil into the solder paste.
21 . The method of claim 16 , wherein the component comprises a standard off-the-shelf component.Join the waitlist — get patent alerts
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