US2007121361A1PendingUtilityA1

Semiconductor Memory Device, Electronic Card and Electronic Device

Assignee: TOSHIBA KKPriority: Jul 16, 2002Filed: Jan 19, 2007Published: May 31, 2007
Est. expiryJul 16, 2022(expired)· nominal 20-yr term from priority
Inventors:Hideo Mukai
G11C 16/0483G11C 7/18G11C 2207/005G11C 5/063H10B 69/00H10B 20/00
41
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor memory device comprises a cell array including bit lines arranged at a uniform pitch; and a plurality of bit line selection transistors connected to respective bit line ends for selectively connecting the bit line to a sense amp. The bit line selection transistors are translationally arrayed in a direction perpendicular to the bit line at an average array pitch greater than eight times the pitch of the bit lines.

Claims

exact text as granted — not AI-modified
1 . A semiconductor memory device, comprising: 
 a cell array including bit lines arranged at a uniform pitch; and    a plurality of bit line selection transistors connected to respective bit lines ends for selectively connecting said bit line to a sense amp, wherein said bit line selection transistors are translationally arrayed in a direction perpendicular to said bit line at an average array pitch greater than eight times said pitch of said bit lines.    
   
   
       2 - 23 . (canceled)

Join the waitlist — get patent alerts

Track US2007121361A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.