US2007120110A1PendingUtilityA1

Thin-Film Transistors Based on Tunneling Structures and Applications

Individually held — no corporate assignee on recordPriority: May 21, 2001Filed: Jan 30, 2007Published: May 31, 2007
Est. expiryMay 21, 2021(expired)· nominal 20-yr term from priority
H10D 48/40H10D 10/231H10H 20/052H10H 20/00H10F 39/107H10F 30/21H10F 30/00H10D 48/362B82Y 10/00B82Y 15/00B82Y 20/00H10N 70/00H10N 60/10
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Claims

Abstract

A hot electron transistor includes an emitter electrode, a base electrode, a collector electrode, and a first tunneling structure disposed and serving as a transport of electrons between the emitter and base electrodes. The first tunneling structure includes at least a first amorphous insulating layer and a different, second insulating layer such that the transport of electrons includes transport by means of tunneling. The transistor further includes a second tunneling structure disposed between the base and collector electrodes. The second tunneling structure serves as a transport of at least a portion of the previously mentioned electrons between the base and collector electrodes by means of ballistic transport such that the portion of the electrons is collected at the collector electrode. An associated method for reducing electron reflection at interfaces in a thin-film transistor is also disclosed.

Claims

exact text as granted — not AI-modified
1 . A hot electron transistor adapted for receiving at least one input signal, said transistor comprising: 
 an emitter electrode;    a base electrode spaced apart from said emitter electrode such that at least a portion of said input signal may be applied across the emitter and base electrodes and, consequently, electrons are emitted from the emitter electrode toward the base electrode;    a first tunneling structure disposed between said emitter and base electrodes and configured to serve as a transport of electrons between and to said emitter and base electrodes, said first tunneling structure including at least a first insulating layer such that the transport of electrons includes, at least in part, transport by means of tunneling;    a collector electrode spaced apart from said base electrode; and    a second tunneling structure disposed between said base and collector electrodes and configured to serve as a transport, between said base and collector electrodes, of at least a portion of said electrons emitted from said emitter electrode by means of ballistic transport such that said portion of the electrons is collectable at said collector electrode,    wherein at least a selected one of said base electrode and said collector electrode is formed, at least in part, of a semi-metal.    
     
     
         2 . The transistor of  claim 1  wherein said selected one of said base electrode and said collector electrode further includes a metal-silicide.  
     
     
         3 . The transistor of  claim 1  wherein said selected one of said base electrode and said collector electrode further includes a metal-nitride.  
     
     
         4 . The transistor of  claim 1  wherein said second tunneling structure is configured to exhibit a first value of hot electron reflection, and wherein said second tunneling structure includes a shaped barrier energy band characteristic such that said first value of hot electron reflection is lower than a second value of hot electron reflection that would be exhibited by the second tunneling structure without the shaped barrier energy band characteristic.  
     
     
         5 . The transistor of  claim 4  wherein said shaped barrier energy band characteristic includes a parabolic grading of said second tunneling structure.  
     
     
         6 . The transistor of  claim 1  wherein said emitter electrode is configured to exhibit a given Fermi level, and wherein said first tunneling structure is configured to exhibit a given conduction band such that said given conduction band differs from said given Fermi level by less than 2 eV.  
     
     
         7 . A transistor adapted for receiving at least one input signal, said transistor comprising: 
 an emitter electrode;    a base electrode spaced apart from said emitter electrode such that at least a portion of said input signal may be applied across the emitter and base electrodes and, consequently, electrons are emitted from the emitter electrode toward the base electrode;    a first tunneling structure disposed between said emitter and base electrodes and configured to serve as a transport of electrons between and to said emitter and base electrodes, said first tunneling structure including at least a first amorphous layer such that the transport of electrons includes, at least in part, transport by means of tunneling;    a collector electrode spaced apart from said base electrode; and    a second tunneling structure disposed between said base and collector electrodes and configured to serve as a transport, between said base and collector electrodes, of at least a portion of said electrons emitted by said emitter electrode by means of ballistic transport such that said portion of the electrons is collectable at said collector electrode,    wherein said second tunneling structure is configured to exhibit a first value of hot electron reflection, and wherein said second tunneling structure includes a shaped barrier energy band characteristic such that said first value of hot electron reflection is lower than a second value of hot electron reflection that would be exhibited by the second tunneling structure without the shaped barrier energy band characteristic.    
     
     
         8 . The transistor of  claim 7  wherein said shaped barrier energy band characteristic includes a parabolic grading of said second tunneling structure.  
     
     
         9 . The transistor of  claim 7  wherein said shaped barrier energy band characteristic includes a rounded grading of said second tunneling structure.  
     
     
         10 . The transistor of  claim 7  wherein said shaped barrier energy band characteristic includes a linear grading of said second tunneling structure.  
     
     
         11 . The transistor of  claim 7  wherein said emitter electrode is configured to exhibit a given Fermi level, and wherein said first tunneling structure is configured to exhibit a given conduction band such that said given conduction band differs from said given Fermi level by less than 2 eV.  
     
     
         12 . A transistor adapted for receiving at least one input signal, said transistor comprising: 
 an emitter electrode;    a base electrode spaced apart from said emitter electrode such that at least a portion of said input signal may be applied across the emitter and base electrodes and, consequently, electrons are emitted from the emitter electrode toward the base electrode;    a first tunneling structure disposed between said emitter and base electrodes and configured to serve as a transport of electrons between and to said emitter and base electrodes, said first tunneling structure including at least a first amorphous insulating layer such that the transport of electrons includes, at least in part, transport by means of tunneling;    a collector electrode spaced apart from said base electrode; and    a second tunneling structure disposed between said base and collector electrodes and configured to serve as a transport, between said base and collector electrodes, of at least a portion of said electrons emitted by said emitter electrode by means of ballistic transport such that said portion of the electrons is collectable at said collector electrode,    wherein said transistor is configured to exhibit a first value of electron emission energy width, and wherein said first tunneling structure includes a shaped barrier energy band characteristic such that said first value of electron emission energy width is lower than a second value of electron emission energy width that would be exhibited by the transistor without the shaped barrier energy band characteristic.    
     
     
         13 . The transistor of  claim 12  wherein said shaped barrier energy band characteristic includes a parabolic grading of said first tunneling structure.  
     
     
         14 . The transistor of  claim 12  wherein said shaped barrier energy band characteristic includes a rounded grading of said first tunneling structure.  
     
     
         15 . A hot electron transistor adapted for receiving at least one input signal, said transistor comprising: 
 an emitter electrode configured to exhibit a given Fermi level;    a base electrode spaced apart from said emitter electrode such that at least a portion of said input signal may be applied across the emitter and base electrodes and, consequently, electrons are emitted from the emitter electrode toward the base electrode;    a first tunneling structure disposed between said emitter and base electrodes and configured to serve as a transport of electrons between and to said emitter and base electrodes, said first tunneling structure including at least a first insulating layer such that the transport of electrons includes, at least in part, transport by means of tunneling;    a collector electrode spaced apart from said base electrode; and    a second tunneling structure disposed between said base and collector electrodes and configured to serve as a transport, between said base and collector electrodes, of at least a portion of said electrons emitted from said emitter electrode by means of ballistic transport such that said portion of the electrons is collectable at said collector electrode,    wherein said first tunneling structure is configured to exhibit a given conduction band such that said given conduction band differs from said given Fermi level of said emitter electrode by less than 2 eV.    
     
     
         16 . A hot hole transistor adapted for receiving at least one input signal, said transistor comprising: 
 an emitter electrode;    a base electrode spaced apart from said emitter electrode such that at least a portion of said input signal may be applied across the emitter and base electrodes and, consequently, holes are emitted from the emitter electrode toward the base electrode;    a first tunneling structure disposed between said emitter and base electrodes and configured to serve as a transport of holes between and to said emitter and base electrodes, said first tunneling structure including at least a first amorphous insulating layer and a different, second insulating layer disposed directly adjacent to and configured to cooperate with said first amorphous insulating layer such that the transport of holes includes, at least in part, transport by means of tunneling;    a collector electrode spaced apart from said base electrode; and    a second tunneling structure disposed between said base and collector electrodes and configured to serve as a transport, between said base and collector electrodes, of at least a portion of said hot holes emitted by said emitter electrode by means of ballistic transport such that said portion of the holes is collectable at said collector electrode.    
     
     
         17 . The transistor of  claim 16 , wherein at least a selected one of said base electrode and said collector electrode is formed, at least in part, of a semi-metal.  
     
     
         18 . The transistor of  claim 16  wherein at least a selected one of said base electrode and said collector electrode is formed, at least in part, of a metal-silicide.  
     
     
         19 . The transistor of  claim 16  wherein at least a selected one of said base electrode and said collector electrode is formed, at least in part, of a metal-nitride.  
     
     
         20 . The transistor of  claim 16  wherein said second tunneling structure is configured to exhibit a first value of hot hole reflection, and wherein said second tunneling structure includes a shaped barrier energy band characteristic such that said first value of hot hole reflection is lower than a second value of hot hole reflection that would be exhibited by the second tunneling structure without the shaped barrier energy band characteristic.  
     
     
         21 . The transistor of  claim 20  wherein said shaped barrier energy band characteristic includes a parabolic grading of said second tunneling structure.  
     
     
         22 . The transistor of  claim 16  wherein said emitter electrode is configured to exhibit a given Fermi level, and wherein said first tunneling structure is configured to exhibit a given conduction band such that said given conduction band differs from said given Fermi level by less than 2 eV.  
     
     
         23 . In a hot electron transistor including a plurality of layers with a plurality of interfaces defined therebetween and ballistic electrons being transported therebetween, said plurality of layers including at least a first layer and a second layer adjacent and juxtaposed to each other and defining a first interface therebetween such that at least a portion of said ballistic electrons may be reflected at said first interface, a method for reducing electron reflection at least said first interface comprising: 
 configuring said first layer to exhibit a first, selected wave function; and    configuring said second layer to exhibit a second, selected wave function such that a first fraction of said ballistic electrons is reflected at said first interface,    wherein said first fraction is smaller than a second fraction of said ballistic electrons that would be reflected at said first interface without said second layer being configured to exhibit said second, selected wave function.    
     
     
         24 . The method of  claim 23  wherein said second layer exhibits a given energy band structure, and wherein configuring said second layer includes grading said energy band structure in a particular way.  
     
     
         25 . The method of  claim 24  wherein grading said energy band structure includes forming said second layer such that said energy band structure exhibits a parabolic shape.  
     
     
         26 . The method of  claim 23  wherein said second layer includes at least one planar surface, and wherein configuring said second layer includes adding a surface texture to said one planar surface.  
     
     
         27 . A transistor adapted for receiving at least one input signal, said transistor comprising: 
 an emitter electrode;    a base electrode spaced apart from said emitter electrode such that at least a portion of said input signal may be applied across the emitter and base electrodes and, consequently, electrons are emitted from the emitter electrode toward the base electrode;    a first tunneling structure disposed between said emitter and base electrodes and configured to serve as a transport of electrons between and to said emitter and base electrodes;    a collector electrode spaced apart from said base electrode; and    a second tunneling structure disposed between said base and collector electrodes and configured to serve as a transport, between said base and collector electrodes, of at least a portion of said electrons emitted by said emitter electrode by means of ballistic transport such that said portion of the electrons is collectable at said collector electrode,    wherein said second tunneling structure is configured to exhibit a first value of hot electron reflection, and wherein said second tunneling structure is further configured to exhibit a selected wave function such that said first value of hot electron reflection is lower than a second value of hot electron reflection that would be exhibited by the second tunneling structure without said selected wave function.    
     
     
         28 . The transistor of  claim 27  wherein said second tunneling structure includes a shaped barrier energy band characteristic.  
     
     
         29 . The transistor of  claim 27  wherein said second tunneling structure is formed of a selected material exhibiting a first value of dielectric constant such that said second tunneling structure exhibits said given wave function.  
     
     
         30 . A linear amplifier adapted for receiving at least one input signal, said linear amplifier comprising: 
 a hot electron transistor including 
 a first emitter electrode,  
 a first base electrode spaced apart from said first emitter electrode such that at least a first portion of said input signal may be applied across the first emitter and first base electrodes and, consequently, electrons are emitted from the first emitter electrode toward the first base electrode,  
 a first tunneling structure disposed between said first emitter and first base electrodes and configured to serve as a transport of electrons between and to said first emitter and first base electrodes, said first tunneling structure including at least a first amorphous insulating layer and a different, second insulating layer disposed directly adjacent to and configured to cooperate with said first amorphous insulating layer such that the transport of electrons includes, at least in part, transport by means of tunneling,  
 a first collector electrode spaced apart from said first base electrode, and  
 a second tunneling structure disposed between said first base and first collector electrodes and configured to serve as a transport, between said first base and first collector electrodes, of at least a portion of said electrons emitted from said first emitter electrode by means of ballistic transport such that said portion of the electrons is collectable at said first collector electrode; and  
   a hot hole transistor including 
 a second emitter electrode,  
 a second base electrode spaced apart from said second emitter electrode such that at least a second portion of said input signal may be applied across the second emitter and second base electrodes and, consequently, holes are emitted from the second emitter electrode toward the second base electrode,  
 a third tunneling structure disposed between said second emitter and second base electrodes and configured to serve as a transport of holes between and to said second emitter and second base electrodes, said third tunneling structure including at least a third amorphous insulating layer and a different, fourth insulating layer disposed directly adjacent to and configured to cooperate with said third amorphous insulating layer such that the transport of holes includes, at least in part, transport by means of tunneling,  
 a second collector electrode spaced apart from said second base electrode, and  
 a fourth tunneling structure disposed between said second base and second collector electrodes and configured to serve as a transport, between said second base and second collector electrodes, of at least a portion of said hot holes emitted by said second emitter electrode by means of ballistic transport such that said portion of the holes is collectable at said second collector electrode;  
   wherein said hot electron transistor and said hot hole transistor are configured in a push-pull amplifier configuration.

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