Flash memory device and method of manufacturing the same

Abstract

A flash memory device and method of manufacturing the same. The flash memory device includes a semiconductor substrate in which a first region where a cell region is formed, a second region where a peripheral region is formed, and a third region formed in the peripheral region at the boundary portion of the cell region and the peripheral region. The device also includes a triple well region formed in the first region and a predetermined region of the third region, an isolation film formed in the first region and having a first depth, an isolation film formed in the second region and having a second depth, which is deeper than the first depth of the isolation film, and a gate oxide film for low voltage and a floating gate, which are stacked on a predetermined region of the first region, a gate oxide film and a gate, which are stacked on a predetermined region of the second region. Additionally, the device includes a dummy flash memory cell in which the floating gate formed in the first region and the gate formed in the second region are separated from each other, and a gate oxide film for high voltage and a gate electrode are stacked on a predetermined region of the third region.

1 - 7 . (canceled)  
   
   
       8 . A flash memory device, comprising: 
 a semiconductor substrate in which a first region where a cell region is formed, a second region where a peripheral region is formed, and a third region formed in the peripheral region at the boundary portion of the cell region and the peripheral region;    a triple well region formed in the first region and a predetermined region of the third region;    an isolation film formed in the first region and having a first depth;    an isolation film formed in the second region and having a second depth, which is deeper than the first depth of the isolation film;    a gate oxide film for low voltage and a floating gate, the gate oxide film for low voltage and the floating gate being stacked on a predetermined region of the first region;    a gate oxide film and a gate, the gate oxide film and the gate being stacked on a predetermined region of the second region; and    a dummy flash memory cell in which the floating gate formed in the first region and the gate formed in the second region are separated from each other, and a gate oxide film for high voltage and a gate electrode are stacked on a predetermined region of the third region.    
   
   
       9 . The flash memory device as claimed in  claim 8 , wherein a triple well region having a deep N well region, a P well region formed in a predetermined region of the deep N well region, and a N well region formed adjacent to the P well region is formed in the cell region.  
   
   
       10 . The flash memory device as claimed in  claim 9 , wherein the P well region of the triple well region is located in the third region.  
   
   
       11 . The flash memory device as claimed in  claim 8 , further including a well region for a peripheral region, is the well region for the peripheral region being formed within the semiconductor substrate of a predetermined region of the peripheral region.  
   
   
       12 . The flash memory device as claimed in  claim 8 , further including a field stop well region within the semiconductor substrate of the peripheral region between the well region for the peripheral region and the triple well region of the cell region.