Electrical contact for high dielectric constant capacitors and method for fabricating the same

Abstract

An electrical contact includes a non-conductive spacer surrounding conductive plug material along the full height of the contact. The spacer inhibits oxide and other diffusion through the contact. In the illustrated embodiment, the contact includes metals or metal oxides which are resistant to oxidation, and additional conductive barrier layers. The contact is particularly useful in integrated circuits which include high dielectric constant materials.

1 . A semiconductor device capable of reducing corrosion of a conductive plug, the semiconductor device comprising: 
 a first barrier liner in an interlevel dielectric, wherein the first barrier liner comprises an insulative material;    a second barrier liner within the first barrier liner, wherein the second barrier liner comprises a first conductive material;    an upper semiconductor device;    a lower semiconductor device; and    an electrical contact between the upper semiconductor device and the lower semiconductor device, wherein the electrical contact includes a conductive plug comprising a second conductive material within the first barrier liner, the second conductive material different from the first conductive material, wherein the first and second barrier liners double wrap the conductive plug within the interlevel dielectric.    
   
   
       2 . The semiconductor device of  claim 1 , wherein the electrical contact further comprises a third barrier cap between the upper semiconductor device and the conductive plug.  
   
   
       3 . The semiconductor device of  claim 1 , wherein the first and second barrier liners form a double barrier against corrosion of the electrical contact during at least the formation of at least a portion of the upper semiconductor device.  
   
   
       4 . The semiconductor device of  claim 1 , wherein the insulative material comprises silicon nitride.  
   
   
       5 . The electrical contact of  claim 1 , wherein the upper semiconductor device comprises a capacitor incorporating a high dielectric constant material.  
   
   
       6 . An electrical contact providing electrical communication between a memory device and a transistor active area, the electrical contact formed within a contact hole, wherein the contact hole is formed within an interlevel dielectric layer, the electrical contact comprising: 
 a conductive contact plug comprising a first conductive material;    a first barrier liner around the conductive contact plug, the first barrier liner comprising a second conductive material acting as a first barrier against corrosion for the contact plug, wherein the first conductive material and the second conductive material are not the same; and    a second barrier liner around the first barrier liner, the second barrier liner inside the contact hole, the second barrier liner comprising an insulative material acting as a second barrier against corrosion for the contact plug, the first and second barrier liners reducing corrosive aspects associated with fabrication of a memory cell capacitor.    
   
   
       7 . The electrical contact of  claim 6 , wherein the memory cell capacitor comprises a high dielectric constant capacitor.  
   
   
       8 . The electrical contact of  claim 6 , further comprising a cap barrier liner between the contact plug and the memory cell capacitor, the cap barrier liner comprising a third conductive material and acting as a third barrier against corrosion for the contact plug.  
   
   
       9 . The electrical contact of  claim 6 , further comprising a silicide layer between the contact plug and the transistor active area.  
   
   
       10 . The electrical contact of  claim 6 , wherein the insulative material comprises silicon nitride.  
   
   
       11 . A contact in an integrated circuit comprising: 
 a contact via etched through an interlevel dielectric;    an insulating liner lining the contact via;    a conductive liner lining the insulating liner, wherein the conductive liner comprises a first conductive material; and    a plug filling the contact via and being double wrapped by the insulating liner and the conductive liner, the plug comprising a second conductive material, wherein the second conductive material is different from the first conductive material.    
   
   
       12 . The apparatus  claim 11 , wherein the second conductive material comprises a transition metal.  
   
   
       13 . The method of  claim 11 , wherein the second conductive material comprises a conductive oxide.  
   
   
       14 . A semiconductor comprising: 
 means for providing an interlevel dielectric over the semiconductor;    means for etching the interlevel dielectric to form a contact hole exposing an active area in the semiconductor;    means for depositing a non-conductive layer into the contact hole;    means for conducting a spacer etch of the non-conductive layer to define a non-conductive liner and to expose the active area in the contact hole;    means for depositing a conductive layer comprising a first conductive material into the contact hole after defining the non-conductive liner;    means for conducting a spacer etch of the conductive layer to define a conductive liner and to expose the active area in the contact hole;    means for depositing a second conductive material in the contact hole after defining the conductive liner to form a contact plug, wherein the second conductive material is different from the first conductive material; and    means for forming a capacitor over the contact plug.    
   
   
       15 . The semiconductor of  claim 14 , wherein the second conductive material is selected from the group consisting of platinum, rhodium, palladium, iridium, ruthenium, rhodium oxide, iridium oxide, ruthenium dioxide, and combinations thereof.  
   
   
       16 . The semiconductor of  claim 14 , further comprising a silicide formed between the contact plug and the active area.  
   
   
       17 . The semiconductor of  claim 16 , further comprising a conductive barrier layer in the contact hole over the silicide.  
   
   
       18 . The semiconductor of  claim 17 , wherein the conductive barrier layer comprises a metal nitride.  
   
   
       19 . The semiconductor of  claim 14 , wherein the capacitor comprises a high dielectric constant material.  
   
   
       20 . The semiconductor of  claim 19 , wherein the high dielectric constant material is elected from the group consisting of tantalum oxide, barium strontium titanate, strontium titanate, barium titanate, lead zirconium titanate, and strontium bismuth tantalite.