US2007111562A1PendingUtilityA1

Circuit Board Manufacturing Technique and Resulting Circuit Board

Individually held — no corporate assignee on recordPriority: Aug 3, 2001Filed: Jan 8, 2007Published: May 17, 2007
Est. expiryAug 3, 2021(expired)· nominal 20-yr term from priority
H10W 90/754H05K 3/0052H05K 2201/09309H05K 2201/0969H05K 1/0259H05K 2201/0919G06K 19/07732G06K 19/077G06K 19/07735H05K 1/117H05K 1/0298H05K 1/0256H05K 1/0268H05K 2203/175H05K 3/242H05K 2201/093H05K 1/11
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Claims

Abstract

A card manufacturing technique and the resulting card are provided. The card has a ground and/or power layer extending to the edges of a circuit board for electrostatic discharge protection but also has gaps at the edge of the ground and/or power layer to avoid short circuiting with conductive segments of another layer deformed when the card is trimmed during manufacture.

Claims

exact text as granted — not AI-modified
1 . A circuit board having at least one peripheral edge comprising: 
 a first conductive layer having conductive segments at the edge of the circuit board;    a first insulative layer;    a second conductive layer separated from the first conductive layer by the first insulative layer, positioned below the first conductive layer, and extending to the edge of the circuit board, the second conductive layer having gaps at the edge of the circuit board, one or more of the gaps aligned with the conductive segments whereby any deformation of the conductive segments that extends over the edge to the plane of the second layer extends within the gaps and does not contact the second conductive layer.    
   
   
       2 . The circuit board of  claim 1  wherein the gaps are slots.  
   
   
       3 . The circuit board of  claim 1  wherein the gaps are notches.  
   
   
       4 . The circuit board of  claim 1  wherein the width of the gap is smaller away from the edge than it is at the edge of the circuit board.  
   
   
       5 . The circuit board of  claim 1  wherein the second conductive layer is the ground or power layer.  
   
   
       6 . The circuit board of  claim 1  further comprising a third conductive layer, the third conductive layer having gaps at the edge of the circuit board, the gaps aligned with the conductive segments whereby any deformation of the conductive segments that extends to the plane of the third layer extends within the gaps and does not contact the third conductive layer.  
   
   
       7 . The circuit board of  claim 6  wherein the third conductive layer is the ground or power layer.  
   
   
       8 . The circuit board of  claim 1  further comprising at least one integrated circuit including flash memory, circuit traces, and passive components.  
   
   
       9 . The circuit board of  8  further comprising at least one integrated circuit including flash memory, circuit traces, and passive components.  
   
   
       10 . A circuit board having at least one edge comprising: 
 a power layer extending to the at least one edge;    a ground layer extending to the at least one edge; and    at least one additional layer having metallic segments at the at least one edge of the circuit board, the at least one additional layer separated from the ground or power layer by an insulating layer;    wherein portions of the ground or power layer positioned under the metallic segments at the at least one edge are slotted whereby any deformation of the metallic segments at said at least one edge does not contact the ground or power layer.    
   
   
       11 . The circuit board of  claim 10  wherein the metallic segments connect to a bus which is also trimmed from the circuit board.  
   
   
       12 . The circuit board of  claim 10  wherein the metallic segments are circuit traces.  
   
   
       13 . The circuit board of  claim 10  wherein the metallic segments are test leads.  
   
   
       14 . A structure comprising: 
 a metallic layer comprising at least one bus, a first area, and segments connecting the at least one bus to the first area; and    a circuit board comprising: 
 at least one edge, wherein the first area of the metallic layer forms a first layer of the circuit board and wherein the segments connecting the bus to the first area are positioned at the at least one edge of the circuit board and extend over the at least one edge of the circuit board to the at least one bus;  
 an insulative layer below the metallic layer; and  
 a second conductive layer positioned below the metallic layer and the insulative layer and extending to the at least one edge, the second conductive layer having gaps at the at least one edge of the circuit board, whereby at least one of the gaps is aligned with at least one of the segments.  
   
   
   
       15 . The structure of  claim 14  whereby any deformation of the conductive segments that extends over the at least one edge to the plane of the second conductive layer extends within the gaps and does not contact the second conductive layer.

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