Process for production of SOI substrate and process for production of semiconductor device

Abstract

A process for producing an adhered SOI substrate without causing cracking and peeling of a single-crystal silicon thin film. The process consists of selectively forming a porous silicon layer in a single-crystal semiconductor substrate, adding hydrogen into the single-crystal semiconductor substrate to form a hydrogen-added layer, adhering the single-crystal semiconductor substrate to a supporting substrate, separating the single-crystal semiconductor substrate at the hydrogen-added layer by thermal annealing, performing thermal annealing again to stabilize the adhering interface, and selectively removing the porous silicon layer to give single-crystal silicon layer divided into islands.

1 . A microprocessor comprising: 
 a CPU and an IC,    said IC comprising: 
 a substrate having an insulating surface;  
 a semiconductor film comprising silicon over said substrate, said semiconductor film including a channel region;  
 a pair of LDD regions in said semiconductor film with said channel region therebetween wherein said pair of LDD regions contain an impurity of one conductivity type at a first concentration;  
 a pair of impurity regions in said semiconductor film adjacent to said pair of LDD regions wherein said pair at impurity regions contain an impurity of the same conductivity type at a second concentration higher than said first concentration;  
 a gate electrode over said channel region with a gate insulating film therebetween wherein said gate electrode partly overlaps each of said pair of LDD regions;  
 side walls formed on side surfaces of said gate electrode; and  
 wherein each of said pair of impurity regions comprises a metal suicide.  
   
   
   
       2 . The microprocessor according to  claim 1 , wherein said metal suicide is a silicide of a metal selected from the group consisting of cobalt, titanium, and tungsten.  
   
   
       3 . A microprocessor comprising: 
 a CPU and an IC,    said IC comprising: 
 a substrate having an insulating surface;  
 an underlying layer comprising aluminum nitride over said substrate;  
 a semiconductor film comprising silicon over said underlying layer, said semiconductor film including a channel region;  
 a pair of LDD regions in said semiconductor film with said channel region therebetween wherein said pair of LDD regions contain an impurity of one conductivity type a first concentration;  
 a pair of impurity regions in said semiconductor film adjacent to said pair of LDD regions wherein said pair of impurity regions contain an impurity of the same conductivity type at a second concentration higher than said first concentration;  
 a gate electrode over said channel region with a gate insulating film therebetween wherein said gate electrode partly overlaps each of said pair of LDD regions;  
 side walls formed on side surface of said gate electrode; and  
 wherein each of said pair of impurity regions comprises a metal silicide.  
   
   
   
       4 . The microprocessor according to  claim 3 , wherein said metal silicide is a silicide of a metal selected from the group consisting of cobalt, titanium, and tungsten.  
   
   
       5 . A microprocessor comprising; 
 a CPU and an IC,    said IC comprising: 
 a substrate having an insulating surface;  
 a semiconductor film comprising silicon over said substrate, said semiconductor film including a channel region;  
 a pair of LDD regions in said semiconductor film with said channel region therebetween wherein said pair of LDD regions contain an impurity of one conductivity type a first concentration;  
 a pair of impurity regions in said semiconductor film adjacent to said pair of LDD regions wherein said pair of impurity regions contain an impurity of the same conductivity type at a second concentration higher than said first concentration;  
 a gate electrode over said channel region with a gate insulating film therebetween wherein said gate electrod partly overlaps each of said pair of LDD regions;  
 side walls formed on side surface of said gate electrode;  
 an interlayer insulating film comprising a rosin over said gate electrode, and  
 wherein each of said pair of impurity regions comprises a metal silicide.  
   
   
   
       6 . The microprocessor according to  claim 5 , wherein said metal silicide is a silicide of a metal selected from the group consisting of cobalt, titanium, and tungsten.  
   
   
       7 . The microprocessor according to  claim 6 , wherein said resin is a resin material selected from the group consisting of polyimide, acrylate, polyamide, poly imideamide, and benzocyclobutene (BCB).  
   
   
       8 . The microprocessor according to  claim 1 , wherein the microprocessor is incorporated into an electronic equipment selected from the group consisting of a computer, a display media, a video camera, a digital camera, a projector, a head-mount display, a car navigation device, a portable information terminal, a home appliance, an autombile and vehicular controllers.  
   
   
       9 . The microprocessor according to  claim 3 , wherein the microprocessor is incorporated into an electronic equipment selected from the group consisting of a computer, a display media, a video camera, a digital camera a projector, a head-mount display, a car navigation device a portable information terminal, a home appliance, an automobile, and vehicular controllers.  
   
   
       10 . The microprocessor according to  claim 5 , wherein the microprocessor is incorporated into an electronic equipment selected from the group consisting of a computer, a display media, a video camera, a digital camera, a projector, a head-mount display, a car navigation device a portable information terminal, a home appliance, an automobile, and vehicular controllers.