Uniform seeding to control grain and defect density of crystallized silicon for use in sub-micron thin film transistors
Abstract
A method to create a polysilicon layer with large grains and uniform grain density is described. A first amorphous silicon layer is formed. A crystallizing agent is selectively introduced in a substantially symmetric pattern, preferably symmetric in two dimensions, across an area of the first amorphous layer. The crystallizing agent may be, for example, silicon nuclei, germanium, or laser energy. A mask layer is formed on the amorphous silicon layer, and holes etched in the mask layer in a symmetric pattern to expose the amorphous layer to, for example, silicon nuclei or germanium) only in the holes. The mask layer is removed and a second amorphous layer formed on the first. If laser energy is used, no mask layer or second amorphous layer is generally used. The wafer is annealed to form a polysilicon layer with substantially no amorphous silicon remaining between the grains.
Claims
exact text as granted — not AI-modified1 . A semiconductor die comprising a first crystallized silicon layer, said first crystallized silicon layer comprising a first area bounded by four adjacent nucleation sites, said first area having no more than five crystal grain boundaries and said first area having no amorphous silicon.
2 . The die of claim 1 , further comprising a plurality of thin film transistors formed in the crystallized silicon layer.
3 . The die of claim 2 wherein the thin film transistors are memory cells.
4 . The die of claim 3 , further comprising a monolithic three dimensional memory array.
5 . The die of claim 1 , wherein the nucleation sites are created by depositing silicon nuclei.
6 . The die of claim 1 , wherein the nucleation sites are created by depositing germanium.Join the waitlist — get patent alerts
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