US2007099417A1PendingUtilityA1

Adhesion and minimizing oxidation on electroless CO alloy films for integration with low K inter-metal dielectric and etch stop

Assignee: APPLIED MATERIALS INCPriority: Oct 28, 2005Filed: Jan 10, 2006Published: May 3, 2007
Est. expiryOct 28, 2025(expired)· nominal 20-yr term from priority
H10W 20/0526H10W 20/0523H10W 20/074H10W 20/037H10W 20/035H10W 20/033H10W 20/077
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Claims

Abstract

A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on the substrate, reducing oxide formation on the capping layer, and then depositing a dielectric material. A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on a substrate, exposing the capping layer to a plasma, heating the substrate to more than about 100° C., and depositing a low dielectric constant material.

Claims

exact text as granted — not AI-modified
1 . A method for processing a patterned semiconductor substrate, comprising: 
 depositing a capping layer upon a conductive material formed on the substrate;    hindering oxide formation on the capping layer; and    depositing a dielectric material.    
   
   
       2 . The method of  claim 1 , wherein the hindering the oxide formation is exposing the capping layer to a plasma.  
   
   
       3 . The method of  claim 2 , wherein the plasma is an argon plasma.  
   
   
       4 . The method of  claim 2 , wherein the plasma is a helium plasma.  
   
   
       5 . The method of  claim 2 , wherein the plasma is a hydrogen plasma.  
   
   
       6 . The method of  claim 2 , wherein the plasma is an ammonia plasma.  
   
   
       7 . The method of  claim 1 , wherein the hindering the oxide formation is heating the substrate.  
   
   
       8 . The method of  claim 7 , further comprising heating the substrate to more than about 100° C.  
   
   
       9 . The method of  claim 1 , wherein the hindering the oxide formation is exposing the capping layer to a silicon containing precursor.  
   
   
       10 . The method of  claim 9 , wherein the silicon containing precursor is silane.  
   
   
       11 . The method of  claim 9 , wherein the capping layer comprises cobalt.  
   
   
       12 . The method of  claim 11 , wherein a cobalt-silicide is formed.  
   
   
       13 . The method of  claim 1 , wherein the dielectric material is a low dielectric constant material.  
   
   
       14 . The method of  claim 1 , further comprising depositing a bulk dielectric material.  
   
   
       15 . A method for processing a semiconductor substrate, comprising: 
 depositing a capping layer upon a conductive material formed on the substrate;    heating the substrate to more than about 100° C.;    exposing the capping layer to a plasma; and    depositing a low dielectric constant material.    
   
   
       16 . The method of  claim 15 , further comprising exposing the capping layer to silane while heating the substrate.  
   
   
       17 . The method of  claim 15 , wherein the plasma is an argon plasma.  
   
   
       18 . The method of  claim 15 , wherein the plasma is a helium plasma.  
   
   
       19 . A method for processing a semiconductor substrate, comprising: 
 depositing a capping layer upon a conductive material formed on the substrate;    heating the substrate to more than about  100 ° C.;    exposing the substrate to a silicon containing precursor;    igniting a plasma;    exposing the substrate to oxidizing gas; and    depositing a bulk dielectric.    
   
   
       20 . A method for processing a semiconductor substrate, comprising: 
 depositing a capping layer upon a conductive material formed on the substrate;    heating the substrate to more than about 100° C.;    igniting a plasma comprising an inert gas;    exposing the substrate to a silicon containing precursor and oxygen; and    depositing a bulk dielectric.

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