Method for providing a delay time
Abstract
An electronic detonator system includes a control unit, a plurality of electronic detonators and a bus which connects the detonators to the control unit. Each electronic detonator includes a number of flags which may assume either of two possible values, each flag indicating a substate of the respective detonators. The flags are readable from the control unit by means of digital data packets and the control unit is adapted, by means of these flags, to check the state of the electronic detonator and control the operation of the electronic detonator. When reading the flags, the electronic detonators give responses in the form of analog response pulses on the bus. The detonator system also includes a portable message receiver which on the basis of the flags obtains messages regarding the connecting status of a detonator.
Claims
exact text as granted — not AI-modified1 - 28 . (canceled)
29 . A method for providing a delay time in connection with firing electronic detonators in an electronic detonator system controlled by a control unit having an external clock frequency, each electronic detonator having an internal clock frequency, the method comprising the steps of storing in each electronic detonator a respective delay time corresponding to a number of external clock frequency pulses, and providing in each electronic detonator a ratio between the external clock frequency and the internal clock frequency and converting the stored delay time to a corresponding calibrated number of internal clock pulses while using said ratio as an internal calibration factor.
30 . A method as claimed in claim 29 , wherein the step of providing a ratio comprises counting a number of external clock cycle pulses and a number of internal clock cycle pulses during the same time.
31 . A method as claimed in claim 30 , wherein said number of external clock cycle pulses are extracted from a regular signalling from the control unit.
32 . A method as claimed in claim 31 , wherein calibration is in progress at the same time as other signalling is in progress between the control unit and. the electronic detonators.
33 . A method as claimed in claim 31 , wherein external clock cycle pulses are extracted from bits of digital data packets signaled from the control unit.
34 . A method as claimed in claim 32 , wherein external clock cycle pulses are extracted from bits of digital data packets signaled from the control unit.
35 . A method as claimed in claim 29 , wherein the internal clock frequency is substantially higher than the external clock frequency.
36 . A method as claimed in claim 30 , wherein a predetermined number of external clock frequency pulses is counted in a first counter at the same time as internal clock frequency pulses are counted in a second counter, the ratio between the contents of the counters corresponding to the ratio between the external and the internal clock frequency.Join the waitlist — get patent alerts
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