US2007090885A1PendingUtilityA1

Charge pump circuit and phase-locked loop circuit

Assignee: MATSUSHITA ELECTRIC INDUSTRIAL CO LTDPriority: Oct 20, 2005Filed: Oct 11, 2006Published: Apr 26, 2007
Est. expiryOct 20, 2025(expired)· nominal 20-yr term from priority
Inventors:Yukio Okazaki
H03L 7/0896
36
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Claims

Abstract

A first current source for sinking electrical current, a first differential circuit for switching the electrical current of the first current source according to an input signal, a second current source for sourcing electrical current, a second differential circuit for switching the electrical current of the second current source according to an input signal, and at least one amplitude limiter/attenuator circuit that reduces the input signal to a desired voltage amplitude and supplies it as a control signal that switches the first and second differential circuits are provided, respective outputs of the first and second differential circuits being combined as output. Disturbances of the output current that are consequent upon driving the switching elements and result from channel charges below gate electrodes and parasitic source and drain capacitances are suppressed.

Claims

exact text as granted — not AI-modified
1 . A charge pump circuit comprising: 
 a first current source for sinking electrical current,    a first differential circuit for switching the electrical current of the first current source according to an input signal,    a second current source for sourcing electrical current,    a second differential circuit for switching the electrical current of the second current source according to an input signal, and    at least one amplitude limiter/attenuator circuit that reduces the input signal to a desired voltage amplitude and supplies it as a control signal that switches the first and second differential circuits,    wherein respective outputs of the first and second differential circuits are combined as output of the charge pump circuit.    
   
   
       2 . The charge pump circuit according to  claim 1 , wherein 
 the amplitude limiter/attenuator circuit connected to the first differential circuit comprises: 
 a series circuit having a first switching element supplied with the input signal as control signal, a first resistance element, and a second resistance element, which are connected in series, the first switching element side being connected to a power-supply voltage and the second resistance element side being grounded; and  
 a series circuit having a second switching element supplied with the input signal as control signal, a third resistance element, and a fourth resistance element, which are connected in series, the second switching element side being connected to a power-supply voltage and the fourth resistance element side being grounded,  
 wherein output signals from the node between the first resistance element and the second resistance element and the node between the third resistance element and the fourth resistance element are inputted into the first differential circuit, and  
   the amplitude limiter/attenuator circuit connected to the second differential circuit comprises: 
 a series circuit having a third switching element supplied with the input signal as control signal, a fifth resistance element, and a sixth resistance element, which are connected in series, the third switching element side being connected to a ground potential and the sixth resistance element side being connected to the power-supply voltage; and  
 a series circuit having a fourth switching element supplied with the input signal as control signal, a seventh resistance element, and an eighth resistance element, which are connected in series, the fourth switching element side being connected to the ground potential and the eighth resistance element side being connected to the power-supply voltage,  
 wherein output signals from the node between the fifth resistance element and the sixth resistance element and the node between the seventh resistance element and the eighth resistance element are inputted into the second differential circuit.  
   
   
   
       3 . The charge pump circuit according to  claim 2 , comprising: 
 a first diode-connected transistor inserted between the ground potential and the second resistance element together with the fourth resistance element, and    a second diode-connected transistor inserted between the power-supply voltage and the sixth resistance element together with the eighth resistance element.    
   
   
       4 . The charge pump circuit according to  claim 2 , comprising: 
 a ninth resistance element inserted between the ground potential and the second resistance element together with the fourth resistance element, and    a tenth resistance element inserted between the power-supply voltage and the sixth resistance element together with the eighth resistance element.    
   
   
       5 . The charge pump circuit according to  claim 1 , wherein 
 the amplitude limiter/attenuator circuit connected to the first differential circuit comprising: 
 an 11th resistance element connected at one end to a power-supply voltage;  
 a series circuit having a first switching element supplied with the input signal as control signal and a 12th resistance element, which are connected in series, the first switching element side being connected to a ground potential and the 12th resistance element side being connected to the other end of the 11th resistance element; and  
 a series circuit having a second switching element supplied with the input signal as control signal and a 13th resistance element, which are connected in series, the second switching element side being connected to the ground potential and the 13th resistance element side being connected to the other end of the 11th resistance element,  
 wherein output signals from the node between the first switching element and the 12th resistance element and the node between the second switching element and the 13th resistance element are inputted into the first differential circuit, and  
   the amplitude limiter/attenuator circuit connected to the second differential circuit comprising: 
 a 14th resistance element connected at one end to the ground potential;  
 a series circuit having a third switching element supplied with the input signal as control signal and a 15th resistance element, which are connected in series, the third switching element side being connected to the power-supply voltage and the 15th resistance element side being connected to the other end of the 14th resistance element; and  
 a series circuit having a fourth switching element supplied with the input signal as control signal and a 16th resistance element, which are connected in series, the fourth switching element side being connected to the power-supply voltage and the 16th resistance element side being connected to the other end of the 14th resistance element,  
 wherein output signals from the node between the third switching element and the 15th resistance element and the node between the fourth switching element and the 16th resistance element are inputted into the second differential circuit.  
   
   
   
       6 . The charge pump circuit according to  claim 5 , comprising: 
 a third diode-connected transistor inserted between the 11th resistance element and the 12th resistance element together with the 13th resistance element, and    a fourth diode-connected transistor inserted between the 14th resistance element and the 15th resistance element together with the 16th resistance element.    
   
   
       7 . The charge pump circuit according to  claim 6 , wherein: 
 the third transistor comprises a plurality of diode-connected transistors connected in series, and    the fourth transistor comprises a plurality of diode-connected transistors connected in series.    
   
   
       8 . The charge pump circuit according to  claim 1 , wherein 
 the amplitude limiter/attenuator circuit connected to the first differential circuit comprising: 
 a third current source connected at one end to a power-supply voltage;  
 a series circuit having a first switching element supplied with the input signal as control signal and a 17th resistance element, which are connected in series, the first switching element side being connected to the other end of the third current source and the 17th resistance element side being grounded; and  
 a series circuit having a second switching element supplied with the input signal as control signal and an 18th resistance element, which are connected in series, the second switching element side being connected to the other end of the third current source and the 18th resistance element side being grounded,  
 wherein output signals from the node between the first switching element and the 17th resistance element and the node between the second switching element and the 18th resistance element are inputted into the first differential circuit, and  
   the amplitude limiter/attenuator circuit connected to the second differential circuit comprising: 
 a fourth current source grounded at one end;  
   a series circuit having a third switching element supplied with the input signal as control signal and a 19th resistance element, which are connected in series, the third switching element side being connected to the other end of the fourth current source and the 19th resistance element side being connected to the power-supply voltage; and 
 a series circuit having a fourth switching element supplied with the input signal as control signal and a 20th resistance element, which are connected in series, the fourth switching element side being connected to the other end of the fourth current source and the 20th resistance element side being connected to the power-supply voltage,  
 wherein output signals from the node between the third switching element and the 19th resistance element and the node between the fourth switching element and the 20th resistance element are inputted into the second differential circuit.  
   
   
   
       9 . The charge pump circuit according to  claim 8 , comprising: 
 a fifth diode-connected transistor inserted between the ground potential and the 17th resistance element together with the 18th resistance element, and    a sixth diode-connected transistor inserted between the power-supply voltage and the 19th resistance element together with the 20th resistance element.    
   
   
       10 . The charge pump circuit according to  claim 8 , comprising: 
 a 21st resistance element inserted between the ground potential and the 17th resistance element together with the 18th resistance element, and    a 22nd resistance element inserted between the power-supply voltage and the 19th resistance element together with the 20th resistance element.    
   
   
       11 . A phase-locked loop circuit, comprising: 
 a voltage-controlled oscillator,    a frequency divider that divides a frequency of an output signal of the voltage-controlled oscillator,    a phase comparator that compares the phases of a reference signal and an output signal of the frequency divider,    a charge pump controlled by an output signal of the phase comparator, and    a low-pass filter supplied with the output of the charge pump,    the voltage-controlled oscillator being controlled by the output of the low-pass filter,    wherein for the charge-pump circuit, a charge pump circuit according to  claim 1  is used, and    the output signal of the phase comparator is inputted as an input signal into the amplitude limiter/attenuator circuit.    
   
   
       12 . A reception device using the phase-locked loop circuit according to  claim 11 .  
   
   
       13 . A transmission device using the phase-locked loop circuit according to  claim 11.

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