Multi-chip package structure

Abstract

A multi-chip package structure includes a first substrate, a first chip, a sub-package, and a first molding compound. The first substrate has a first surface and a second surface. The first chip is attached to the first surface of the first substrate by flip-chip bonding so as to reduce a step of wire bonding and reduce the total height of the package structure. The sub-package includes a second substrate, a second chip, and a second molding compound. The second substrate has a first surface and a second surface. The second substrate is a flexible substrate and is directly connected to the first surface of the first substrate so as to reduce another step of wire bonding.

1 . A multi-chip package structure, comprising: 
 a first substrate having a first surface and a second surface;    a first chip attached to the first surface of the first substrate by flip-chip bonding;    a sub-package stacked on the first chip, the sub-package comprising 
 a second substrate having a first surface and a second surface, the second substrate being a flexible substrate and connected to the first surface of the first substrate directly,  
 a second chip electrically connected to the second substrate, and  
 a second molding compound enclosing the second chip and a part of the second substrate; and  
   a first molding compound enclosing the first chip, the sub-package, and a part of the first surface of the first substrate.    
     
     
         2 . The package structure as claimed in  claim 1 , wherein the sub-package further comprises a first adhesive for attaching the second chip to the second surface of the second substrate.  
     
     
         3 . The package structure as claimed in  claim 2 , wherein the first chip has a first surface, the second molding compound has a second surface, and the second surface of the second molding compound is attached to the first surface of the first chip by a second adhesive.  
     
     
         4 . The package structure as claimed in  claim 1 , wherein the sub-package further comprises a first adhesive for attaching the second chip to the first surface of the second substrate.  
     
     
         5 . The package structure as claimed in  claim 4 , wherein the first chip has a first surface, and the second surface of the second substrate is attached to the first surface of the first chip by a second adhesive.  
     
     
         6 . The package structure as claimed in  claim 1 , wherein the sub-package further comprises a plurality of first connecting wires for electrically connecting the second substrate and the second chip.  
     
     
         7 . The package structure as claimed in  claim 1 , wherein the first surface of the first substrate has a plurality of first contacts, the second surface of the second substrate has a plurality of second contacts, and the second surface of the second substrate directly contacts the first surface of the first substrate, such that the first contacts and the second contacts are electrically connected.  
     
     
         8 . The package structure as claimed in  claim 1 , wherein the second substrate is electrically connected to the first surface of the first substrate by hot pressing.  
     
     
         9 . The package structure as claimed in  claim 1 , further comprising a third chip disposed on the first surface of the second substrate, the third chip being electrically connected to the first substrate by a plurality of first connecting wires.  
     
     
         10 . The package structure as claimed in  claim 1 , further comprising a plurality of solder balls formed on the second surface of the first substrate.  
     
     
         11 . The package structure as claimed in  claim 1 , wherein the first chip is selected from a group consisting of a digital chip, an analog chip, an optical chip, a logic chip, a microprocessing chip, and a memory chip.  
     
     
         12 . The package structure as claimed in  claim 1 , wherein the second chip is selected from a group consisting of a digital chip, an analog chip, an optical chip, a logic chip, a microprocessing chip, and a memory chip.