US2007083745A1PendingUtilityA1
Data processor
Est. expiryFeb 7, 2015(expired)· nominal 20-yr term from priority
Inventors:Katsumi Iwata
G06F 12/0638G06F 8/654
48
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Claims
Abstract
To obtain a correct vector address even if an interrupt occurs during erasing or programming of the data in a built-in ROM 18 by moving a part of a built-in RAM13 to a vector address area by a bus controller 27. Thereby, a microcomputer is prevented from running away and the safety of a system is improved at the time of on-board programming of the built-in ROM 18.
Claims
exact text as granted — not AI-modified1 - 5 . (canceled)
6 . A data processing unit formed on a semiconductor substrate, comprising:
a non-volatile memory adapted to electrically erase or program data into the non-volatile memory; a central processing unit accessing the non-volatile memory; and a control circuit; wherein the data processing unit is capable of operating in a boot mode or an active mode; wherein the control circuit terminates a process for erasing or programming of data into the non-volatile memory in response to an interrupt request or an exception processing request to the central processing unit, when the non-volatile memory is erasing or programming data in the boot mode; and wherein the data processing unit operates in part to input data from outside the data processing unit for programming in the non-volatile memory in the boot mode.
7 . A data processing unit according to claim 6 ,
wherein the data processing unit comprises an interface unit for inputting or outputting data, and wherein the interface unit inputs data for programming in the non-volatile memory from outside of the data processing unit in the boot mode.
8 . A data processing unit according to claim 7 ,
wherein the data processing unit executes data for programming of the non-volatile memory in the active mode.Join the waitlist — get patent alerts
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