Method of forming transistor having recess channel in semiconductor memory, and structure thereof

Abstract

Embodiments of the invention include sequentially forming a pad oxide film and a mask film on a semiconductor substrate, and then forming an opening for partially exposing the pad oxide film. An undercut region is formed using the mask film as an etch mask, exposing a partial surface of the substrate. A spacer is formed surrounding both sidewalls of the mask film, and a recess is formed in the substrate. A gate oxide film, a gate electrode, a gate insulation film, a gate spacer, and source and drain regions are also formed. A resultant transistor structure has a small open critical dimension that improves process margin and provides uniformity to the recess depth, and removes a requirement that a bottom critical dimension of a subsequently formed self-aligned contact should be small. Degradation of the gate oxide film and increases in leakage current may also be prevented.

1 . A transistor structure comprising: 
 a semiconductor substrate having a recess channel, the recess channel having a convexly rounded upper corner and a concavely rounded lower corner;    a gate oxide film formed on a surface of the recess channel and a surface of the semiconductor substrate; and    a gate electrode formed on the gate oxide film within the recess channel, the gate electrode overlapping the upper corner of the recess channel.    
   
   
       2 . The structure of  claim 1 , the semiconductor substrate comprising a low density doping layer.  
   
   
       3 . The structure of  claim 2 , the semiconductor substrate comprising high density source and drain regions that have a greater dopant concentration than the low density doping layer.  
   
   
       4 . The structure of  claim 3 , further comprising a channel adjusting dopant doping region in a lower part of the recess channel.  
   
   
       5 . The structure of  claim 1 , the gate electrode comprising a metal silicide film formed on an upper part of the gate electrode.  
   
   
       6 . A semiconductor device comprising: 
 a semiconductor substrate having a recess channel, the recess channel having a convexly rounded upper corner and a concavely rounded lower corner;    a gate dielectric film formed on a surface of the recess channel and a surface of the semiconductor substrate; and    a gate electrode formed on the gate dielectric film within the recess channel, the gate electrode overlapping the upper corner of the recess channel.