Ultraviolet Blocking Layer

Abstract

Methods and apparatuses are disclosed relating to blocking ultraviolet electromagnetic radiation from a semiconductor. Ultraviolet electromagnetic radiation, such as ultraviolet electromagnetic radiation generated by a plasma process, which may otherwise damage a semiconductor can be blocked from one or more layers below an ultraviolet blocking layer.

1 . A semiconductor device having an ultraviolet blocking layer, said device comprising: 
 a semiconductor substrate; and    a layer of silicon enriched oxide overlying said semiconductor substrate, said layer of silicon enriched oxide having a ratio of a silicon concentration to an oxygen concentration sufficient for ultraviolet blocking, wherein said ratio is at least about 10.    
   
   
       2 . The semiconductor device of  claim 1 , wherein the layer of silicon enriched oxide has an extinction coefficient of at least about 1.3 for a range of wavelengths less than 400 nanometers.  
   
   
       3 . The semiconductor device of  claim 1 , wherein the layer of silicon enriched oxide has a refractive index greater than about 1.6 for a range of wavelengths less than 400 nanometers.  
   
   
       4 . The semiconductor device of  claim 1 , wherein said layer of silicon enriched oxide has a thickness of about 100 Angstroms to 8000 Angstroms.  
   
   
       5 . The semiconductor device of  claim 1 , wherein said layer of silicon enriched oxide is formed from at least one of the following reactants: SiH4/O2, SiH4N2O, TEOS/O2, and TEOS/O3.  
   
   
       6 . The semiconductor device of  claim 1 , wherein said layer of silicon enriched oxide is formed by at least one of plasma-enhancement chemical vapor deposition (PECVD), semi-atmosphere chemical vapor deposition (SACVD) and high-density plasma chemical vapor deposition (HDPCVD).  
   
   
       7 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said semiconductor substrate beneath the layer of silicon enriched oxide; and    a layer of dielectric overlying said layer of silicon enriched oxide.    
   
   
       8 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said semiconductor substrate beneath the layer of silicon enriched oxide; and    a layer of dielectric overlying said layer of silicon enriched oxide    wherein said layer of silicon enriched oxide has a thickness of about 200 Angstroms to 1000 Angstroms.    
   
   
       9 . The semiconductor device of  claim 1 , wherein said layer of silicon enriched oxide is formed by at least SiH4 at a flow rate of about 50˜200 sccm and O2 at a flow rate of about 20˜100 sccm.  
   
   
       10 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said semiconductor substrate beneath the layer of silicon enriched oxide; and    a layer of dielectric overlying said layer of silicon enriched oxide,    wherein said conductors comprise at least one of polysilicon, polysilicon/silicide composite and metal.    
   
   
       11 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said semiconductor substrate beneath the layer of silicon enriched oxide; and    a layer of dielectric overlying said layer of silicon enriched oxide,    wherein said conductors comprise at least one of aluminum, aluminum alloy, and copper.    
   
   
       12 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said semiconductor substrate beneath the layer of silicon enriched oxide; and    a layer of dielectric overlying said layer of silicon enriched oxide,    wherein said dielectric is at least one of silicon oxide and silicon nitride and is deposited by at least one of PECVD, HDPCVD and SACVD.    
   
   
       13 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said layer of silicon enriched oxide.    
   
   
       14 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said layer of silicon enriched oxide,    wherein said layer of silicon enriched oxide has a thickness of 1000 Angstroms to 3000 Angstroms.    
   
   
       15 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said layer of silicon enriched oxide,    wherein said layer of silicon enriched oxide has a refractive index of at least about 1.6 for a range of wavelengths less than 400 nanometers.    
   
   
       16 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said layer of silicon enriched oxide,    wherein said layer of silicon enriched oxide is formed by at least one of plasma-enhancement chemical vapor deposition (PECVD), semi-atmosphere chemical vapor deposition (SACVD) and high-density plasma chemical vapor deposition (HDPCVD).    
   
   
       17 . The semiconductor device of  claim 1 , comprising: 
 a plurality of patterned conductors overlying said layer of silicon enriched oxide,    wherein said layer of silicon enriched oxide is formed by one or more reactants including at least one of SiH4/O2, SiH4/N2O, TEOS/O2, and TEOS/O3.    
   
   
       18 . The semiconductor device of  claim 17 , wherein said conductors comprise at least one of polysilicon, polysilicon/silicide composite, aluminum, aluminum alloy and copper.