Air gap for tungsten/aluminum plug applications

Abstract

An air gap structure substantially reduces undesired capacitance between adjacent interconnects, metal lines or other features in an integrated circuit device. The air gap extends above, and may also additionally extend below, the interconnects desired to be isolated thus minimizing fringing fields between the lines. The integrated air gap structure can be utilized in conjunction with a tungsten plug process. Also, multiple levels of the integrated air gap structure can be fabricated to accommodate multiple metal levels while always ensuring that physical dielectric layer support is provided to the device structure underlying the interconnects.

1 - 36 . (canceled)  
     
     
         37 . An air gap structure in an integrated circuit comprising: 
 a conductive structure within a first dielectric layer on a substrate, said conductive structure including conductive plugs;    an opening on the first dielectric layer and adjacent to the conductive structure and    a second dielectric layer situated over the substrate to form at least an air gap in the opening.    
     
     
         38 . An air gap structure in an integrated circuit comprising: 
 a device layer;    a first conductive line and a second conductive line situated above said device layer;    said first conductive line including a first conductive plug, and said second conductive line including a second conductive plug;    a trench located between said first conductive line and a second conductive line adjacent to said first conductive plug and said second conductive plug;    a first dielectric layer arranged so as form sidewalls of said trench between said first conductive line and a second conductive line and adjacent to said first conductive plug and second conductive plug;    a second dielectric layer situated over said first conductive line, said second conductive line and said trench;    wherein an air gap is situated between said first conductive line and a second conductive line and is defined by a region bounded by a bottom of said trench, said sidewalls, said first conductive line and said second conductive line, and said second dielectric layer.    
     
     
         39 . The air gap structure of  claim 38  in which said air gap comprises an air gap extending above a top surface of said first conductive line.  
     
     
         40 . The air gap structure of  claim 38  wherein both of said plugs extend and electrically couple to said device layer.  
     
     
         41 . The air gap structure of  claim 38  wherein said first conductive plug and second conductive plug are selected from tungsten or aluminum based metal.  
     
     
         42 . The air gap structure of  claim 38  wherein said conductive lines are made of aluminum or aluminum alloy layer.  
     
     
         43 . The air gap structure of  claim 38  in which said trench extends below a top surface of said device layer.  
     
     
         44 . The air gap structure of  claim 38  in which said second dielectric layer comprises a dielectric layer selected from the group including SiO 2 , USG, PSG, FSG and BPSG.  
     
     
         45 . The air gap structure of  claim 44  in which said second dielectric layer comprises a dielectric layer about 1000 to 10000 Angstroms thick.  
     
     
         46 . An integrated circuit comprising: 
 a device layer;    a plurality of conductive lines situated above said device layer;    a plurality of conductive plugs coupling said conductive lines to said device layer;    a plurality of trenches located between adjacent ones of said plurality of conductive lines;    a first dielectric material arranged so as to line at least portions of sidewalls of at least some of said plurality of trenches;    a second dielectric layer situated over said plurality of conductive lines and said plurality of trenches;    wherein a plurality of air gaps are situated between said adjacent ones of said plurality of conductive lines, said plurality of air gaps being defined by separate spaces bounded by bottoms of said plurality of trenches, said sidewalls, and said second dielectric layer;    said plurality of air gaps being further arranged such that at least some of said plurality of air gaps extend below a top surface of said device layer, and at least some of said plurality of air gaps extend above a top surface of said plurality of conductive lines.    
     
     
         47 . An integrated circuit comprising: 
 a device layer;    an interconnect structure including a first plurality of conductive lines situated at a first level above said device layer, and a second plurality of conductive lines situated at a second level above said device layer;    wherein said first plurality of conductive lines are coupled to said device layer through a first level of one or more conductive plugs, and said second plurality of conductive lines are coupled to said first plurality of conductive lines through a second level of one or more conductive plugs;    wherein said first plurality of conductive lines and said second plurality of conductive lines, and/or said first level of one or more conductive plugs and said second level of one or more conductive plugs overlap in regions of the integrated circuit resulting in a third plurality of multi-level conductive lines;    a plurality of trenches located between adjacent ones of said third plurality of multi-level conductive lines;    a first dielectric material arranged so as to line at least portions of sidewalls of at least some of said plurality of trenches;    a second dielectric layer situated over said third plurality of multi-level conductive lines and said plurality of trenches;    wherein a plurality of multi-level air gaps are situated between said adjacent ones of said third plurality of conductive lines, said plurality of multi-level air gaps being defined by separate spaces bounded by bottoms of said plurality of trenches, said sidewalls, and said second dielectric layer;    said plurality of air gaps being further arranged such that at least some of said plurality of air gaps extend below a top surface of said device layer, and at least some of said plurality of air gaps extend above a top surface of said third plurality of multi-level conductive lines.