US2007072364A1PendingUtilityA1

Method for fabricating transistor gate structures and gate dielectrics thereof

Individually held — no corporate assignee on recordPriority: Dec 11, 2003Filed: Oct 13, 2006Published: Mar 29, 2007
Est. expiryDec 11, 2023(expired)· nominal 20-yr term from priority
H10P 14/6532H10P 14/6529H10P 14/6526H10P 14/6334H10P 14/693H10D 64/01344H10D 64/0134H10D 64/693H10D 64/691
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Claims

Abstract

Methods are disclosed for treating deposited gate dielectric materials, in which the deposited dielectric is subjected to one or more non-oxidizing anneals to densify the material, one or more oxidizing anneals to mitigate material defects, and to a nitridation process to introduce nitrogen into the gate dielectric. The annealing may be performed before and/or after the nitridation to mitigate deposition and/or nitridation defects and to densify the material while mitigating formation of unwanted low dielectric constant oxides at the interface between the gate dielectric and the semiconductor substrate.

Claims

exact text as granted — not AI-modified
1 . A method for treating a deposited high-k gate dielectric layer during fabrication of a semiconductor device, the method comprising: 
 nitriding a deposited high-k gate dielectric layer prior to forming a gate electrode;    performing a first anneal of the deposited high-k dielectric in a non-oxidizing ambient prior to forming a gate electrode; and    performing a second anneal of the deposited high-k dielectric in an oxidizing ambient prior to forming a gate electrode.    
   
   
       2 - 32 . (canceled)  
   
   
       33 . The method of  claim 1 , wherein the first and second anneals are performed prior to nitriding the high-k dielectric layer.  
   
   
       34 . The method of  claim 33 , wherein the first anneal is performed at a temperature of about 1000 degrees C. or less.  
   
   
       35 . The method of  claim 34 , wherein the first anneal is performed at a temperature of about 900 degrees C. or less.  
   
   
       36 . The method of  claim 35 , wherein the first anneal is performed at a temperature of about 700 degrees C. or more.  
   
   
       37 . The method of  claim 35 , wherein the non-oxidizing ambient of the first anneal comprises N2, Ar, He, or Ne.  
   
   
       38 . The method of  claim 34 , wherein the non-oxidizing ambient of the first anneal comprises N2, Ar, He, or Ne.  
   
   
       39 . The method of  claim 33 , wherein the non-oxidizing ambient of the first anneal comprises N2, Ar, He, or Ne.  
   
   
       40 . The method of  claim 33 , wherein nitriding the deposited high-k gate dielectric layer comprises performing a nitridation anneal in a nitrogen containing ambient.  
   
   
       41 . The method of  claim 40 , wherein the nitridation anneal is performed at a temperature of about 1000 degrees C. or less and wherein the nitrogen containing ambient comprises NH 3 .  
   
   
       42 . The method of  claim 33 , wherein nitriding the deposited high-k gate dielectric layer comprises performing a plasma nitridation process.  
   
   
       43 . The method of  claim 33 , wherein the second anneal is performed at a temperature of about 1000 degrees C. or less.  
   
   
       44 - 66 . (canceled)  
   
   
       67 . A method of treating a high-k gate dielectric layer, the method comprising: 
 performing one or more pre-nitridation anneal processes of a deposited high-k gate dielectric prior to forming a gate electrode;    performing a nitridation process after the pre-nitridation anneal processes; and    performing one or more post-nitridation anneal processes of a deposited high-k gate dielectric after the nitridation process and prior to forming a gate electrode.

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