US2007054484A1PendingUtilityA1

Method for fabricating semiconductor packages

Assignee: SILICONWARE PRECISION INDUSTRIES CO LTDPriority: Jun 24, 2004Filed: Oct 26, 2006Published: Mar 8, 2007
Est. expiryJun 24, 2024(expired)· nominal 20-yr term from priority
H10W 74/00H10W 74/142H10W 72/0198H10W 72/072H10W 72/877H10W 72/073H10W 72/07251H10W 72/07236H10W 72/20H10W 95/00H10W 74/117H10W 74/016H10W 40/778H10W 70/05
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Claims

Abstract

A method for positioning a semiconductor component is disclosed. The method includes providing the semiconductor component and a carrier, the carrier having a plurality of openings, a protruded portion being provided at each corner position of each of the openings and extended toward a center of the opening, a distance between two diagonal protruded portions of the opening being slightly larger than that between two diagonal corners of the semiconductor component; and positioning the semiconductor component in the openings of the carrier via the protruded portions provided at each corner position of each of the openings.

Claims

exact text as granted — not AI-modified
1 . A method for positioning a semiconductor component, the method comprising: 
 providing the semiconductor component and a carrier, the carrier having a plurality of openings, a protruded portion being provided at each corner position of each of the openings and extended toward a center of the opening, a distance between two diagonal protruded portions of the opening being slightly larger than that between two diagonal comers of the semiconductor component; and    positioning the semiconductor component in the openings of the carrier via the protruded portions provided at each corner position of each of the openings.    
   
   
       2 . The method of  claim 1 , wherein a distance between two diagonal protruded portions of each of the openings is slightly larger than that between two diagonal corners of the semiconductor component by 0.1-0.2 mm.  
   
   
       3 . The method of  claim 2 , wherein the distance between two diagonal protruded portions of each of the openings is slightly larger than that between two diagonal corners of the semiconductor component by 0.1 mm.  
   
   
       4 . The method of  claim 1 , wherein the protrude portion is one selected from the group consisting of a triangle, rectangle and a round arc.  
   
   
       5 . The method of  claim 1 , wherein the carrier is made of one selected from the group consisting of FR4, FR5, BT and metal.  
   
   
       6 . The method of  claim 1 , wherein the semiconductor component is a substrate provided with a chip.  
   
   
       7 . A carrier structure for positioning a semiconductor component, the carrier structure comprising: 
 a carrier having a plurality of openings; and    a plurality of protruded portions, which are provided at each corner position of each of the openings and extended toward a center of the opening, a distance between two diagonal protruded portions of the opening being slightly larger than that between two diagonal corners of the semiconductor component, allowing the semiconductor component to be positioned in the openings of the carrier.    
   
   
       8 . The carrier structure of  claim 7 , wherein a distance between two diagonal protruded portions of each of the openings is slightly larger than that between two diagonal corners of the semiconductor component by 0.1-0.2 mm.  
   
   
       9 . The carrier structure of  claim 8 , wherein the distance between two diagonal protruded portions of each of the openings is slightly larger than that between two diagonal corners of the semiconductor component by 0.1 mm.  
   
   
       10 . The carrier structure of  claim 7 , wherein the protrude portion is one selected from the group consisting of a triangle, rectangle and a round arc.  
   
   
       11 . The carrier structure of  claim 7 , wherein the carrier is made of one selected from the group consisting of FR4, FR5, BT and metal.  
   
   
       12 . The carrier structure of  claim 7 , wherein the semiconductor component is a substrate provided with a chip.

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