Semiconductor device

Abstract

Aiming at realizing high breakdown voltage and low ON resistance of a semiconductor device having the super-junction structure, the semiconductor device of the present invention has a semiconductor substrate having an element forming region having a gate electrode formed therein, and a periphery region formed around the element forming region, and having an field oxide film formed therein; and a parallel p-n layer having n-type drift regions and p-type column regions alternately arranged therein, formed along the main surface of the semiconductor substrate, as being distributed over the element forming region and a part of the periphery region, wherein the periphery region has no column region formed beneath the end portion on the element forming region side of the field oxide film and has p-type column regions as at least one column region formed under the field oxide film.

1 . A semiconductor device comprising: 
 a semiconductor substrate having an element forming region having a gate electrode formed therein, and a periphery region formed around said element forming region, and having an element isolation region formed therein; and    a parallel p-n layer having first-conductivity-type drift regions and second-conductivity-type column regions alternately arranged therein, formed along the main surface of said substrate over said element forming region and a part of said periphery region,    wherein said periphery region has no column region formed beneath the end portion on the element forming region side of the element isolation region, and has at least one column region formed under said element isolation region.    
   
   
       2 . The semiconductor device according to  claim 1 , wherein the distance between the opposing end portions of two of said column regions, located while placing the end portion on said element forming region side of said element isolating region, is not larger than the distance between other adjacent column regions.  
   
   
       3 . The semiconductor device according to  claim 1 , further comprising a second-conductivity-type base region formed in said substrate in an area along the main surface thereof, 
 said second-conductivity-type base region being not provided under said element isolation region.    
   
   
       4 . The semiconductor device according to  claim 1 , wherein said element forming region further comprises: 
 a second-conductivity-type base region formed in said substrate in an area along the main surface thereof,    a first-conductivity-type source region formed in an area in said second-conductivity-type base region, and    a first-conductivity-type drain region formed under said parallel p-n layer,    so that said element forming region forms a vertical field effect transistor.    
   
   
       5 . The semiconductor device according to  claim 1 , wherein each of said column regions is buried in said first-conductivity-type drift region.  
   
   
       6 . The semiconductor device according to  claim 1 , wherein said first-conductivity-type drift regions in said parallel p-n layer are coupled together to be formed a reticular pattern in a plan view.  
   
   
       7 . The semiconductor device according to  claim 1 , further comprising an anther first-conductivity-type drift region formed under said parallel p-n layer, 
 wherein each of said first-conductivity-type drift region in said parallel p-n layer is coupled to said another first-conductivity-type drift region.    
   
   
       8 . The semiconductor device according to  claim 4 , further comprises a trench formed from the surface of said base region into said first-conductivity-type drift regions in said parallel p-n layer, said trench being formed in a reticular pattern in a plan view, 
 wherein said gate electrode is formed in said trench.    
   
   
       9 . The semiconductor device according to  claim 1 , wherein said column regions formed in said periphery region are arranged according to an orthogonal lattice pattern in a plan view.  
   
   
       10 . The semiconductor device according to  claim 1 , the element isolation region comprises a field oxide film, the end portion on the element forming region side of the element isolation region coincides with the edge portion on the element forming region side of the field oxide film.  
   
   
       11 . The semiconductor device according to  claim 10 , further comprises a second-conductivity-type base region formed in said substrate in an area along the main surface thereof, said second-conductivity-type base region being extended from said element forming region to the portion being overlapped with said field oxide film, and said second-conductivity-type base region does not contact to said column region formed beneath said field oxide film.  
   
   
       12 . The semiconductor device according to  claim 1 , wherein the end portion of said element isolation region is provided along said second-conductivity-type column regions which reside between said element forming region and said periphery region in a plan view of said semiconductor device.