Electronic array having nodes and methods

Abstract

An electronic network comprises a plurality of nodes that each comprise a current input and a current output, and at least one transistor arranged as a first current mirror and a second current mirror. The first and the second current mirrors are complementary to each other such that an output of the first current mirror is operably connected to an input of the second current mirror. Resistive connections connect the nodes such that the output of one or more of the nodes is operably connected to the input of one or more of the nodes.

1 . An electronic network comprising: 
 a plurality of layers, wherein each layer comprises a plurality of nodes that are operably interconnected, wherein each node comprises a current input and a current output, and wherein each node further comprises at a first current mirror and a second current mirror, with the first and the second current mirrors being complementary to each other such that an output of the first current mirror is operably connected to an input of the second current mirror, and wherein the first and second current mirrors are selected from a group consisting of field effect transistors and bipolar transistors; and    wherein the nodes are connected such that the output of one or more of the nodes is operably connected to the input of one or more of the nodes, wherein information from one of the layers is supplied to another one of the layers.    
   
   
       2 . A network as in  claim 1 , wherein at least some of the nodes further comprise a Schmitt trigger, an inverter and a capacitor.  
   
   
       3 . A network as in  claim 1 , wherein the resistance between the current inputs and the current outputs of the nodes is in the range from about  0 . 001  ohm to about 1,000 mega ohms.  
   
   
       4 . A network as in  claim 1 , wherein the first current mirror comprises a PNP bipolar transistor and the second current mirror comprises a NPN bipolar transistor.  
   
   
       5 . A network as in  claim 1 , wherein the first current mirror comprises a P type field effect transistor and the second current mirror comprises a N type CMOS transistor.  
   
   
       6 . A network as in  claim 1 , further comprising circuitry configured to provide an input current to at least one of the nodes.  
   
   
       7 . A network as in  claim 1 , further comprising circuitry configured to convert a current output from at least one of the nodes to a different form of signal.  
   
   
       8 . A network as in  claim 1 , further comprising a circuit element positioned between the output of the first current mirror and the input of the second current mirror.  
   
   
       9 . A network as in  claim 1 , wherein the circuit element is selected from a group consisting of transistors and resistors.  
   
   
       10 . A node for an electronic network, comprising: 
 a current input and a current output that are each configured to be operably coupled to a similar node in an electronic network;    a first current mirror and a second current mirror, with the first and the second current mirrors being complementary to each other such that an output of the first current mirror is connected to an input of the second current mirror, and wherein the first and second current mirrors are selected from a group consisting of field effect transistors and bipolar transistors.    
   
   
       11 . A node as in  claim 10 , wherein the first current mirror comprises a PNP bipolar transistor and the second current mirror comprises a NPN bipolar transistor, a Schmitt trigger, an inverter and a capacitor.  
   
   
       12 . A node as in  claim 10 , wherein the first current mirror comprises a P type field effect transistor and the second current mirror comprises a N type field effect transistor, a Schmitt trigger, an inverter and a capacitor.  
   
   
       13 . A node as in  claim 10 , further comprising a circuit element positioned between the output of the first current mirror and the input of the second current mirror.  
   
   
       14 . A network as in  claim 13 , wherein the circuit element is selected from a group consisting of transistors and resistors.  
   
   
       15 - 22 . (canceled)