Multichip packages with exposed dice

Abstract

Multichip packages and methods for making same. The present invention generally allows for either the back of a flipchip, the back of a mother die, or both to be exposed in a multichip package. When the mother die is connected to the package contacts, the back of the flip chip is higher than the electrical connections. Accordingly, the back of the flip chip can be exposed. Furthermore, if a temporary tape substrate is used with a leadframe panel that does not have a die attach pad, the package can be even thinner. Once the temporary tape substrate is removed, both the back of the flipchip and the back of the mother die will be exposed from the encapsulant.

1 . A method of packaging integrated circuits comprising: 
 providing a semiconductor wafer that has an array of mother dice formed therein;    mounting a multiplicity of singulated daughter dice on the wafer, each daughter die being mounted on an associated mother die and electrically connected to the mother die by direct soldering using a flip chip mounting approach, wherein the daughter dice have shorter lengths and widths than the mother dice such that the mother dice have at least some contacts that are exposed relative to their respective daughter dice, and wherein the wafer having the array of mother dice has not been diced or singulated prior to the mounting of the daughter dice.    
     
     
         2 . A method as recited in  claim 1 , further comprising dicing the semiconductor wafer having daughter dice mounted onto the mother dice on the wafer to create a multiplicity of individual chip stacks.  
     
     
         3 . A method as recited in  claim 1 , further comprising underfilling the regions beneath the daughter dice between the daughter and mother dice at the wafer level.  
     
     
         4 . A method of packaging integrated circuits comprising: 
 positioning a plurality of multi-chip stacks on a lead frame panel having a multiplicity of device areas, wherein each chip stack consists of a mother die having an active surface and a daughter die having an active surface, the active surface of the daughter die being flip chip mounted to the active surface of the mother die, and wherein each chip stack is positioned in an associated device area;    electrically connecting contacts on the mother dice of the selected chip stacks to contacts within their associated device area;    encapsulating the device areas of the lead frame panel; and    singulating the device areas after the encapsulation to create a multiplicity of individual stacked multi-chip packages.    
     
     
         5 . A method as recited in  claim 4 , wherein the daughter dice have shorter lengths and widths than the mother dice such that the mother dice have at least some contacts that are exposed relative to their respective daughter dice.  
     
     
         6 . A method as recited in  claim 4 , wherein the lead frame device area does not include a die attach pad and wherein positioning the chip stacks includes placing the chip stacks on a temporary tape substrate that is also adhered to a back surface of the lead frame panel, the method further comprising removing the temporary tape substrate after the encapsulation.  
     
     
         7 . A method as recited in  claim 4 , wherein the encapsulation covers back surfaces of the daughter dice.  
     
     
         8 . A method as recited in  claim 4 , wherein the encapsulation is arranged to expose back surfaces of the daughter dice.  
     
     
         9 . A method as recited in  claim 4 , further comprising applying heat spreaders to back surfaces of the daughter dice before the encapsulation.  
     
     
         10 . A method as recited in  claim 4 , wherein the resulting multi-chip packages are quad flat packs—no lead packages.  
     
     
         11 . A method as recited in  claim 4 , wherein selected multi-chip stacks are each mounted on a third die mounted within a device area of the lead frame panel, wherein contacts on said third dice are electrically connected to contacts within their associated device areas.  
     
     
         12 . A method as recited in  claim 11 , further comprising electrically connecting contacts on the mother dice of the selected multi-chip stacks to contacts within their associated device areas.  
     
     
         13 . A method as recited in  claim 11 , wherein a spacer is positioned between a mother die and a third die.