Protective layer in memory device and method therefor

Abstract

A method protecting a non-volatile memory device, the method including forming a non-volatile memory device including a polycide structure formed over a non-conducting charge trapping layer, and forming a protective layer over at least a portion of the polycide structure, die protective layer being adapted to absorb electromagnetic wave energy having a wavelength shorter than visible light. A device constructed in accordance with the method is also disclosed.

1 . A method for protecting a non-volatile memory device, the method comprising: 
 forming a non-volatile memory device comprising a polycide structure formed over a non-conducting charge trapping layer; and    forming a protective layer over at least a portion of said polycide structure, said protective layer being adapted to absorb electromagnetic wave energy having a wavelength shorter than visible light    
   
   
       2 . The method according to  claim 1  wherein said forming said protective layer comprises forming an ultraviolet absorber  
   
   
       3 . The method according to  claim 1  wherein said forming said protective layer comprises forming a nitride layer  
   
   
       4 . The method according to  claim 3  wherein said forming said nitride layer comprises forming a silicon-rich silicon nitride alloy.  
   
   
       5 . The method according to  claim 4  wherein said forming said nitride layer comprises forming a nitride layer comprising Si 3+x N 4 , wherein x>0.  
   
   
       6 . The method according to  claim 3  wherein said forming said nitride layer comprises forming a hydrogenated silicon-rich silicon nitride alloy  
   
   
       7 . The method according to  claim 3  wherein said forming said nitride layer comprises forming an amorphous silicon-rich silicon nitride alloy  
   
   
       8 . The method according to  claim 1  wherein said forming said protective layer comprises forming a nitride layer with a thickness of 50- 1000  Å.  
   
   
       9 . The method according to  claim 1  wherein said forming said protective layer comprises forming a layer of resistive undoped polysilicon.  
   
   
       10 . The method according to  claim 9  wherein said forming said protective layer of undoped polysilicon comprises forming a layer with a resistivity of at least 1 GΩ.  
   
   
       11 . The method according to  claim 9  wherein said forming said protective layer of undoped polysilicon comprises forming a layer with a thickness of 30-600 Å.  
   
   
       12 . The method according to  claim 1  and further comprising forming at least one additional layer over said protective layer.  
   
   
       13 . The method according to  claim 12  wherein said forming said at least one additional layer comprises forming at least one of a layer of undoped glass, a layer of doped glass and a metal layer  
   
   
       14 . The method according to  claim 12  and further comprising plasma etching said at least one additional layer with said protective layer making at least a portion of said polycide structure.  
   
   
       15 . The method according to  claim 1  wherein said forming said non-volatile memory device comprises forming said non-volatile memory device with a polycide structure comprising is a polysilicon layer and a metal silicide film.  
   
   
       16 . A non-volatile memory device comprising: 
 a polycide structure formed over a nonconducting charge trapping layer; and    a protective layer formed over at least a portion of said polycide structure, said protective layer being adapted to absorb electromagnetic wave energy leaving a wavelength shorter than visible light.    
   
   
       17 . The device according to  claim 16  wherein said protective layer comprises an ultraviolet absorber.  
   
   
       18 . The device according to  claim 16  wherein said protective layer comprises a nitride layer.  
   
   
       19 . The device according to  claim 18  wherein said nitride layer comprises a silicon-rich silicon nitride alloy  
   
   
       20 . The device according to  claim 19  wherein said nitride layer comprises Si 3+x N 4 , wherein x>0.  
   
   
       21 . The device according to  claim 18  wherein said nitride layer comprises a hydrogenated silicon-rich silicon nitride alloy  
   
   
       22 . The device according to  claim 18  wherein said nitride layer comprises an amorphous silicon-rich silicon nitride alloy.  
   
   
       23 . The device according to  claim 16  wherein said protective layer comprises a nitride layer with a thickness of 50-1000 Å.  
   
   
       24 . The device according to  claim 16  wherein said protective layer comprises a layer of resistive undoped polysilicon.  
   
   
       25 . The device according to  claim 24  wherein said protective layer of undoped polysilicon comprises a resistivity of at least 1 GΩ.  
   
   
       26 . The device according to  claim 24  wherein said protective layer of undoped polysilicon comprises a thickness of 30-600 Å.  
   
   
       27 . The device according to  claim 16  and further comprising at least one additional layer formed over said protective layer  
   
   
       28 . The device according to  claim 27  wherein said at least one additional layer comprises at least one of a layer of undoped glass, a layer of doped glass, and a metal layer  
   
   
       29 . The device according to  claim 16  wherein said polycide structure comprises a polysilicon layer and a metal silicide film.  
   
   
       30 . The device according to  claim 29  wherein said polysilicon layer comprises a polycrystalline silicon (polysilicon).  
   
   
       31 . The device according to  claim 29  wherein said polysilicon layer is doped with a dopant.  
   
   
       32 . The device according to  claim 29  wherein said polysilicon layer is undoped.  
   
   
       33 . The device according to  claim 29  wherein said metal silicide film comprises at least one of a tungsten silicide film and a titanium silicide film.  
   
   
       34 . The device according to  claim 16  wherein said non-volatile memory device comprises a nitride, read only memory (NROM) device, and said non-conducting charge trapping layer comprises a nitride charge trapping layer.