US2007023810A1PendingUtilityA1

Capacitor, semiconductor device having the same, and method of manufacturing the semiconductor device

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Oct 27, 2003Filed: Sep 29, 2006Published: Feb 1, 2007
Est. expiryOct 27, 2023(expired)· nominal 20-yr term from priority
H10P 14/43H10D 1/716H10D 1/694H10D 1/682H10D 1/042H10D 1/696H10B 12/0335H10B 12/033H10B 12/00
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Claims

Abstract

A semiconductor device with a stack type capacitor having a lower electrode formed of an aluminum-doped metal, and a manufacturing method thereof are provided. The semiconductor device includes: a semiconductor substrate having a gate structure and an active region; an interlayer dielectric film formed on the active region; a lower electrode formed of a metal containing aluminum on the interlayer dielectric film; a dielectric layer formed on the lower electrode; an upper electrode formed on the dielectric layer; and a plug formed in the interlayer dielectric film to electrically connect the active region with the lower electrode. The method includes: forming a gate structure and an active region on a semiconductor substrate; forming an interlayer dielectric film on the resultant semiconductor substrate; forming a plug in the interlayer dielectric film to electrically connect with the active region; forming a mold oxidation layer on the plug and the interlayer dielectric film; patterning the mold oxidation layer with a predetermined pattern and forming a lower electrode of material containing aluminum on the plug; and sequentially forming a dielectric layer and an upper electrode on the lower electrode.

Claims

exact text as granted — not AI-modified
1 - 15 . (canceled)  
   
   
       16 . A method of manufacturing a semiconductor device having a capacitor, the method comprising: 
 forming a gate structure and an active region on a semiconductor substrate;    forming an interlayer dielectric film on the resultant semiconductor substrate;    forming a plug in the interlayer dielectric film to electrically connect with the active region;    forming a mold oxidation layer on the plug and the interlayer dielectric film;    patterning the mold oxidation layer with a predetermined pattern, and then forming a lower electrode of material containing aluminum on the plug; and    sequentially forming a dielectric layer and an upper electrode on the lower electrode.    
   
   
       17 . The method of  claim 16 , wherein the lower electrode containing aluminum is formed of a material containing TaAlN.  
   
   
       18 . The method of  claim 16 , wherein the lower electrode containing aluminum is formed of a material containing TiAlN.  
   
   
       19 . The method of  claim 18 , wherein the forming of the lower electrode comprises: 
 flowing a mixture gas of material TiA 4  and aluminum ligand, trimethyl aluminum (Al[(CH 3 ) 3 ]), on the semiconductor substrate with the plug to form a TiAl layer while HA and CO 2  emit out in gas form; and    flowing NH 3  over the TiAl layer to form a TiAlN layer while HA emits out in gas form,    where “A” is a halogen element selected from the group consisting of fluorine (F), chorine (Cl), iodine (I) and bromine (Br).    
   
   
       20 . The method of  claim 16 , wherein the dielectric layer comprises LaO x  or HfO x , where x is between 0 and 3.  
   
   
       21 . The method of  claim 16 , wherein the plug is formed of a material containing silicon (Si).  
   
   
       22 . The method of  claim 16 , wherein the mold oxidation layer is SiO 2 .  
   
   
       23 . A method of manufacturing a semiconductor device having a capacitor, the method comprising: 
 forming a gate structure and a source and drain region on a semiconductor substrate;    forming an interlayer dielectric film on the resultant semiconductor substrate;    forming a plug in the interlayer dielectric film to electrically connect with the source and drain region;    forming a diffusion prevention film of material containing aluminum on the plug;    forming a mold oxidation layer on the diffusion prevention film and the interlayer dielectric film;    patterning the mold oxidation layer with a predetermined pattern and forming a lower electrode on the plug; and    sequentially forming a dielectric layer and an upper electrode on the lower electrode.    
   
   
       24 . The method of  claim 23 , wherein the diffusion prevention film containing aluminum is formed of a material containing TaAlN.  
   
   
       25 . The method of  claim 23 , wherein the diffusion prevention film containing aluminum is formed of a material containing TiAlN.  
   
   
       26 . The method of  claim 25 , wherein the forming of the diffusion prevention film comprises: 
 flowing a mixture gas of material TiA 4  and aluminum ligand, trimethyl aluminum (Al[(CH 3 ) 3 ]) on the semiconductor substrate with the plug to form a TiAl layer while HA and CO 2  emit out in gas form; and    flowing NH 3  over the TiAl layer to form a TiAlN layer while HA emits out in gas form, where “A” is a halogen element selected from the group consisting of fluorine (F), chorine (Cl), iodine (I), and bromine (Br).    
   
   
       27 . The method of  claim 23 , wherein the dielectric layer comprises LaO x  or HfO x  where x is between 0 and 3.  
   
   
       28 . The method of  claim 23 , wherein the upper electrode is formed of a material containing Ru or TiN.  
   
   
       29 . The method of  claim 23 , wherein the mold oxidation layer comprises SiO 2 .

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