US2007018675A1PendingUtilityA1

Semiconductor wafer examination method and semiconductor chip manufacturing method

Assignee: SEIKO EPSON CORPPriority: Jul 25, 2005Filed: Jul 20, 2006Published: Jan 25, 2007
Est. expiryJul 25, 2025(expired)· nominal 20-yr term from priority
H10P 74/23G01R 31/287G01R 31/2875G01R 31/2881
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Claims

Abstract

A semiconductor wafer examination method that includes: preparing a wafer formed with a chip area for use as a semiconductor chip; firstly examining the wafer by probing; pressing an electrode of the wafer with a pressure member having a flat surface; and secondly examining the wafer by probing.

Claims

exact text as granted — not AI-modified
1 . A method of examining a semiconductor wafer, comprising: 
 preparing a wafer formed with a chip area for use as a semiconductor chip;    firstly examining the wafer by probing;    pressing an electrode of the wafer with a pressure member having a flat surface; and    secondly examining the wafer by probing.    
   
   
       2 . The method of examining a semiconductor according to  claim 1 , wherein 
 in the step of pressing the electrode, the electrode is heated.    
   
   
       3 . The method of examining a semiconductor according to  claim 1 , wherein 
 in the step of pressing the electrode, an upper surface of the electrode is made flat.    
   
   
       4 . The method of examining a semiconductor according to  claim 1 , wherein 
 the pressure member uses a bonding tool.    
   
   
       5 . The method of examining a semiconductor according to  claim 1 , wherein 
 in the chip area, a semiconductor device is formed below the electrode.    
   
   
       6 . A method of manufacturing a semiconductor chip, comprising: 
 preparing a wafer formed with a chip area for use as a semiconductor chip;    firstly examining the wafer by probing;    pressing an electrode of the wafer with a pressure member having a flat surface;    secondly examining the wafer by probing; and    forming the semiconductor chip by dicing the wafer.

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