US2007017093A1PendingUtilityA1

Method of making an interposer with contact structures

Individually held — no corporate assignee on recordPriority: Apr 10, 1998Filed: Sep 27, 2006Published: Jan 25, 2007
Est. expiryApr 10, 2018(expired)· nominal 20-yr term from priority
Y10T29/49126Y10T29/49117Y10T29/49124Y10T29/49147Y10T29/49155H05K 2201/0367Y10T29/49179H05K 3/326Y10T29/49453H01R 43/205Y10T29/49165Y10T29/49222H01R 12/57G01R 1/0466G01R 1/0408H05K 2201/09045Y10T29/49174H05K 2201/09472H05K 3/325H05K 1/119H05K 2201/0373H05K 3/4007H05K 2201/10689H05K 2201/0133Y10T29/49123
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Claims

Abstract

A method of making an interposer having an array of contact structures for making temporary electrical contact with the leads of a chip package. The contact structures may make contact with the leads as close as desired to the body of the chip package. Moreover, the contact structures can be adapted for making contact with leads having a very fine pitch. In one embodiment, the contact structures include raised members formed over a body of the interposer. A conductive layer is formed over each of the raised members to provide a contact surface for engaging the leads of the chip package. In another embodiment, the raised members are replaced with depressions formed into the interposer. A conductive layer is formed on an inside surface of each depression to provide a contact surface for engaging the leads of the chip package. Any combination of raised members and depressions may be used.

Claims

exact text as granted — not AI-modified
1 . A method of making an interposer structure for providing electrical communication between an array of electrical leads of an integrated circuit and external circuitry, the method comprising: 
 providing a substrate including a dielectric material; and    forming an array of contact structures on said substrate, said array of contact structures being sized and spaced so as to be capable of electrically engaging said array of electrical leads, wherein each of said contact structures is formed by:    forming a depression into said substrate, said depression having an inside surface defined thereon;    forming a conductive layer disposed over at least a portion of said inside surface of said depression;    forming an electrical trace disposed over a surface of said substrate; and    electrically connecting said electrical trace with said conductive layer, wherein said electrical trace comprises a conductive material so as to provide electrical communication between said conductive layer and said external circuitry.    
   
   
       2 . The method of  claim 1 , wherein the substrate comprises a silicon-containing material.  
   
   
       3 . The method of  claim 1 , further comprising forming an array of terminal contact points in electrical communication with said array of contact structures, wherein: 
 said array of contact structures has a first pitch; and    said array of terminal contact points has a second pitch that is greater than said first pitch.    
   
   
       4 . The method of  claim 3 , wherein: 
 said array of terminal contact points is in electrical communication with said array of contact structures by conductive members selected from the group consisting of conductive tape, wirebonded leads, and non-bonded leads; and    said conductive members are positioned in electrical contact with said electrical traces.    
   
   
       5 . The method of  claim 1 , wherein forming the depression into the substrate comprises conducting an etching operation on the substrate.  
   
   
       6 . The method of  claim 1 , wherein the conductive layer comprises a material selected from the group consisting of titanium, tungsten, beryllium, copper, gold, palladium, combinations thereof, and alloys thereof.

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