US2007015313A1PendingUtilityA1

Submount of semiconductor laser diode, method of manufacturing the same, and semiconductor laser diode assembly using the submount

Assignee: SAMSUNG ELECTRONICS CO LTDPriority: Mar 8, 2003Filed: Jun 30, 2006Published: Jan 18, 2007
Est. expiryMar 8, 2023(expired)· nominal 20-yr term from priority
H10H 20/857H01S 5/20H01S 5/0233H01S 5/023H01S 5/0207H01S 5/0237H01S 5/0234H01S 5/2205H01S 5/0235H01S 5/0206
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Claims

Abstract

Provided is a submount flip-chip bonded to a semiconductor laser diode chip with stepped first and second electrodes. The submount includes a substrate having first and second surfaces which are separated by a step height corresponding to a height difference between the first and second electrodes; first and second metal layers being formed to the same thickness on the first and second surfaces, respectively; and first and second solder layers being formed to the same thickness on the first and second metal layers, respectively, and being bonded to the first and second electrodes, respectively.

Claims

exact text as granted — not AI-modified
1 . A method of manufacturing a submount flip-chip bonded to a semiconductor laser diode chip with stepped first and second electrodes, the method comprising: 
 (a) etching a substrate to form first and second surfaces that are separated by a step height corresponding to a height difference between the first and second electrodes;    (b) depositing a metal on the first and second surfaces to form first and second metal layers of the same thickness; and    (c) depositing a solder on the first and second metal layers to form first and second solder layers of the same thickness to be respectively bonded to the first and second electrodes.    
     
     
         2 . The method according to  claim 1 , wherein in step (a), the substrate is dry etched.  
     
     
         3 . The method according to  claim 1 , wherein the substrate is made of one of AlN, SiC, GaN, and an insulating material having a heat transfer coefficient corresponding to that of one of AlN, SiC, and GaN.  
     
     
         4 . The method according to  claim 1 , wherein the first and second metal layers are made of an alloy of two or more selected from the group consisting of Cr, Ti, Pt, and Au.  
     
     
         5 . The method according to  claim 1 , wherein the first and second solder layers are made of an alloy of two or more selected from the group consisting of Cr, Ti, Pt, Au, Mo, and Sn.

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