Inter-sequence permutation turbo code system and operation methods thereof
Abstract
A high performance real-time turbo code system is proposed. The proposed system exploits cooperative coding architecture and a proper decoding scheduling to achieve low error rate within a constrained latency. Permutation schemes and hardware embodiments utilizing the cooperative coding are also shown. Various memory saving techniques are provided to reduce memory usage in both encoder and decoder. The proposed system is compatible with 3 rd generation mobile standards and cost of designing new parts exclusively for the proposed system can be minimized. This invention can provide substantial coding and system capacity gains for real-time applications in a wireless environment.
Claims
exact text as granted — not AI-modified1 . An inter-sequence permutation (ISP) turbo code system, comprising:
an ISP turbo code encoder for receiving a sequence input and then generating a pre-permutation codeword sequence output before an ISP and a post-permutation codeword sequence output after the ISP, wherein the encoder includes:
an ISP interleaver having:
an inter-sequence permuter performs ISP and comprises at least one ISP control unit and a memory pool; an ISP algorithm is permanently embedded or temporally recorded in the at least one ISP control unit to control input to and output from the memory pool, and execution of the ISP between sequences stored in the memory pool; and
an ISP turbo code decoder for receiving the pre-permutation codeword sequence output and post-permutation codeword sequence output, wherein the decoder decodes the sequences by at least one a posteriori probability (APP) decoder therein, characterized in that decoding runs of the APP decoder are controlled by at least one scheduler and the decoding runs are performed in a do-loop manner so that the APP decoder can repeatedly be used in decoding.
2 . The system as claimed in claim 1 , wherein the ISP turbo code encoder comprises a first convolutional code encoder and a second convolutional code encoder, located in portions of the ISP turbo code encoder before and after the ISP interleaver, respectively.
3 . The system as claimed in claim 2 , wherein the ISP turbo code encoder outputs three codeword sequence outputs which are an original sequence from the sequence input, a sequence output of original sequence processed by the first convolutional code encoder, and a sequence output of original sequence processed by and in the order of the ISP interleaver and the second convolutional code encoder.
4 . The turbo code system as claimed in claim 2 , wherein the ISP turbo code encoder outputs three codeword sequence outputs which are a sequence output of original sequence processed by the first convolutional code encoder, a sequence output of original sequence processed by and in the order of the ISP interleaver and the second convolutional code encoder, and a sequence output of original sequence processed by the ISP interleaver.
5 . The turbo code system as claimed in claim 1 , wherein the ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm, the inter-sequence permuter, and a second sequence permuter utilizing a conventional sequence permuting algorithm, wherein the conventional sequence permuting algorithms utilized in the first sequence permuter and second sequence permuter can be different or identical, and a sequence inputted into the ISP interleaver is processed in the order of the first sequence permuter, the inter-sequence permuter, and then the second sequence permuter.
6 . The turbo code system as claimed in claim 1 , wherein the ISP interleaver comprises the inter-sequence permuter and a second sequence permuter utilizing a conventional sequence permuting algorithm, wherein a sequence inputted into the ISP interleaver is processed in the order of the inter-sequence permuter and then the second sequence permuter.
7 . The turbo code system as claimed in claim 1 , wherein the ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm and the inter-sequence permuter, wherein a sequence inputted into the ISP interleaver is processed in the order of the first sequence permuter and then the inter-sequence permuter.
8 . The turbo code system as claimed in claim 1 , wherein the ISP interleaver comprises the inter-sequence permuter, wherein a sequence inputted into the ISP interleaver is processed by the inter-sequence permuter.
9 . The turbo code system as claimed in claim 2 , wherein the ISP turbo code encoder is further connected to a BCH or CRC encoder located between the sequence input and the ISP turbo code encoder.
10 . The turbo code system as claimed in claim 5 , wherein the ISP turbo code decoder comprises:
an APP decoder pool having at least one APP decoder; a scheduler pool having at least one scheduler; a memory pool having a plurality of memory units for storing sequences; a memory index table for storing information on relationship between the memory units and received sequences; an ISP control unit pool having at least one ISP control unit; an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit; a first sequence permuter pool having at least one first sequence permuter; a first sequence de-permuter pool having at least one first sequence de-permuter; a second sequence permuter pool having at least one second sequence permuter; and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the scheduler pool controls operations of the APP decoder pool, the ISP control unit pool, the ISDP control unit pool, the first sequence permuter pool, the first sequence de-permuter pool, the second sequence permuter pool and the second sequence de-permuter pool; wherein the scheduler pool stores and retrieves sequences into and from the memory pool; wherein the scheduler pool provides and retrieves sequences to and from the APP decoder pool; wherein the scheduler pool updates and retrieves information to and from the decoder index table and memory index table; wherein the ISP control unit pool and ISDP control unit pool interchange sequences with the memory pool; wherein the first sequence permuter pool, the first sequence de-permuter pool, the second sequence permuter pool, and the second sequence de-permuter pool interchange sequences with the memory pool; and wherein the scheduler pool comprises at least one adder and subtracter.
11 . The turbo code system as claimed in claim 6 , wherein the ISP turbo code decoder comprises:
an APP decoder pool having at least one APP decoder; a scheduler pool having at least one scheduler; a memory pool having a plurality of memory units for storing sequences; a memory index table for storing information on relationship between the memory units and received sequences; an ISP control unit pool having at least one ISP control unit; an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit; a second sequence permuter pool having at least one second sequence permuter; and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the scheduler pool controls operations of the APP decoder pool, the ISP control unit pool, the ISDP control unit pool, the second sequence permuter pool and the second sequence de-permuter pool; wherein the scheduler pool stores and retrieves sequences into and from the memory pool; wherein the scheduler pool provides and retrieves sequences to and from the APP decoder pool; wherein the scheduler pool updates and retrieves information to and from the decoder index table and memory index table; wherein the ISP control unit pool and ISDP control unit pool interchange sequences with the memory pool; wherein the second sequence permuter pool and the second sequence de-permuter pool interchange sequences with the memory pool; and wherein the scheduler pool comprises at least one adder and subtracter.
12 . The turbo code system as claimed in claim 7 , the ISP turbo code decoder comprises:
an APP decoder pool having at least one APP decoder; a scheduler pool having at least one scheduler; a memory pool having a plurality of memory units for storing sequences; a memory index table for storing information on relationship between the memory units and received sequences; an ISP control unit pool having at least one ISP control unit; an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit; a first sequence permuter pool having at least one first sequence permuter; and a first sequence de-permuter pool having at least one first sequence de-permuter; wherein the scheduler pool controls operations' of the APP decoder pool, the ISP control unit pool, the ISDP control unit pool, the first sequence permuter pool, and the first sequence de-permuter pool; wherein the scheduler pool stores and retrieves sequences into and from the memory pool; wherein the scheduler pool provides and retrieves sequences to and from the APP decoder pool; wherein the scheduler pool updates and retrieves information to and from the decoder index table and memory index table; wherein the ISP control unit pool and ISDP control unit pool interchange sequences with the memory pool; wherein the first sequence permuter pool and first sequence de-permuter pool interchange sequences with the memory pool; and wherein the scheduler pool comprises at least one adder and subtracter.
13 . The turbo code system as claimed in claim 8 , the ISP turbo code decoder comprises:
an APP decoder pool having at least one APP decoder; a scheduler pool having at least one scheduler; a memory pool having a plurality of memory units for storing sequences; a memory index table storing information on relationship between the memory units and received sequences; an ISP control unit pool having at least one ISP control unit; an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit; wherein the scheduler pool controls operations of the APP decoder pool, the ISP control unit pool, and the ISDP control unit pool; wherein the scheduler pool stores and retrieves sequences into and from the memory pool; wherein the scheduler pool provides and retrieves sequences to and from the APP decoder pool; wherein the scheduler pool updates and retrieves information to and from the decoder index table and memory index table; wherein the ISP control unit pool and ISDP control unit pool interchange sequences with the memory pool; and wherein the scheduler pool comprises at least one adder and subtracter.
14 . The turbo code system as claimed in claim 10 , wherein the adder and subtracter can be replaced by a multiplier and a divider respectively in accordance with scale or format of the sequences.
15 . The turbo code system as claimed in claim 11 , wherein the adder and subtracter can be replaced by a multiplier and a divider respectively in accordance with scale or format of the sequences.
16 . The turbo code system as claimed in claim 12 , wherein the adder and subtracter can be replaced by a multiplier and a divider respectively in accordance with scale or format of the sequences.
17 . The turbo code system as claimed in claim 13 , wherein the adder and subtracter can be replaced by a multiplier and a divider respectively in accordance with scale or format of the sequences.
18 . The turbo code system as claimed in claim 10 , further comprises a scheduler controller connected to every scheduler in the scheduler pool if the scheduler pool is arranged in a star type.
19 . The turbo code system as claimed in claim 11 , further comprises a scheduler controller connected to every scheduler in the scheduler pool if the scheduler pool is arranged in a star type.
20 . The turbo code system as claimed in claim 12 , further comprises a scheduler controller connected to every scheduler in the scheduler pool if the scheduler pool is arranged in a star type.
21 . The turbo code system as claimed in claim 13 , further comprises a scheduler controller connected to every scheduler in the scheduler pool if the scheduler pool is arranged in a star type.
22 . The turbo code system as claimed in claim 10 , wherein the scheduler pool further comprises at least one decision maker used to output a hard decoding output sequence.
23 . The turbo code system as claimed in claim 11 , wherein the scheduler pool further comprises at least one decision maker used to output a hard decoding output sequence.
24 . The turbo code system as claimed in claim 12 , wherein the scheduler pool further comprises at least one decision maker used to output a hard decoding output sequence.
25 . The turbo code system as claimed in claim 13 , wherein the scheduler pool further comprises at least one decision maker used to output a hard decoding output sequence.
26 . The turbo code system as claimed in claim 10 , wherein the ISP turbo code decoder further comprises a decoder index table storing information on relationship between necessity to perform APP decoding and codeword sequence numbers, which connects and interchanges information with the scheduler pool.
27 . The turbo code system as claimed in claim 11 , wherein the ISP turbo code decoder further comprises a decoder index table storing information on relationship between necessity to perform APP decoding and codeword sequence numbers, which connects and interchanges information with the scheduler pool.
28 . The turbo code system as claimed in claim 12 , wherein the ISP turbo code decoder further comprises a decoder index table storing information on relationship between necessity to perform APP decoding and codeword sequence numbers, which connects and interchanges information with the scheduler pool.
29 . The turbo code system as claimed in claim 13 , wherein the ISP turbo code decoder further comprises a decoder index table storing information on relationship between necessity to perform APP decoding and codeword sequence numbers, which connects and interchanges information with the scheduler pool.
30 . The turbo code system as claimed in claim 10 , wherein the scheduler pool is further connected to at least one termination tester for performing a termination test.
31 . The turbo code system as claimed in claim 11 , wherein the scheduler pool is further connected to at least one termination tester for performing a termination test.
32 . The turbo code system as claimed in claim 12 , wherein the scheduler pool is further connected to at least one termination tester for performing a termination test.
33 . The turbo code system as claimed in claim 13 , wherein the scheduler pool is further connected to at least one termination tester for performing a termination test.
34 - 59 . (canceled)
60 . The turbo code system as claimed in claim 10 , wherein only one of the ISP and ISDP control unit pool exists if the ISP algorithm and the ISDP algorithm are the same, and the existing control unit pool performs both ISP and ISDP.
61 . The turbo code system as claimed in claim 11 , wherein only one of the ISP and ISDP control unit pool exists if the ISP algorithm and the ISDP algorithm are the same, and the existing control unit pool performs both ISP and ISDP.
62 . The turbo code system as claimed in claim 12 , wherein only one of the ISP and ISDP control unit pool exists if the ISP algorithm and the ISDP algorithm are the same, and the existing control unit pool performs both ISP and ISDP.
63 . The turbo code system as claimed in claim 13 , wherein only one of the ISP and ISDP control unit pool exists if the ISP algorithm and the ISDP algorithm are the same, and the existing control unit pool performs both ISP and ISDP.
64 . A method for generating probability measure sequences using the system as claimed in claim 3 , wherein the ISP turbo code decoder uses codeword sequence outputs of the ISP turbo code encoder, wherein pre-permutation codeword sequence output received from the encoder, which comprises the original sequence from the sequence input and the sequence output of original sequence processed by the first convolutional code encoder, is processed in odd-numbered APP decoding runs, and post-permutation codeword sequence received from the ISP turbo code encoder, which comprises the sequence output of original sequence processed by and in the order of the ISP interleaver and the second convolutional code encoder, is processed in even-numbered APP decoding runs,
whereby the original sequence from the sequence input is called a first codeword sequence, the sequence output of original sequence processed by a first convolutional code encoder is called a second codeword sequence, and the sequence output of original sequence processed by and in the order of the ISP interleaver and a second convolutional code encoder is called a third codeword sequence, the method comprising the following steps for odd-numbered APP decoding run and even-numbered APP decoding run: For the odd-numbered APP decoding run: step of first APP decoder input: calculating a first input of the APP decoder by combining a sequence of a priori probability measure and the first codeword sequence through an adder of a scheduler pool; step of second APP decoder input: inputting the second codeword sequence into the APP decoder as a second input; step of outputting first result: outputting a first result probability measure sequence by the APP decoder; step of generating first soft decoding output: calculating a first sequence of soft decoding output by eliminating the sequence of a priori probability measure from the first result probability measure sequence through a subtracter of the scheduler pool; step of first interchange: outputting the first sequence of soft decoding output as a sequence of a priori probability measure of the subsequent even-numbered APP decoding run, wherein the even-numbered APP decoding runs work on post-permutation codeword sequences, such that permutation must be performed on the first sequence of soft decoding output before the first sequence of soft decoding output can be used in the subsequent even-numbered APP decoding run; For the even-numbered APP decoding run: step of third APP decoder input: receiving two inputs by an APP decoder wherein the inputs are the sequence of a priori probability measure in step of first interchange and the third codeword sequence, and outputting a second result probability measure sequence, wherein the APP decoder can be or not be the same as one used in the odd-numbered APP decoding run; step of outputting second result: calculating a second sequence of soft decoding output by eliminating the sequence of a priori probability measure in step of first interchange or step of third APP decoder input from the second result probability measure sequence through the subtracter of the scheduler pool, wherein the subtracter can be or not be the same as one used in the odd-numbered APP decoding run; step of second interchange: outputting the second sequence of soft decoding output as the sequence of a priori probability measure of the subsequent odd-numbered APP decoding run, wherein the odd-numbered APP decoding runs work on pre-permutation codeword sequences, de-permutation must be performed on the second sequence of soft decoding output before the second sequence of soft decoding output can be used in the subsequent odd-numbered APP decoding run.
65 . A method for calculating probability measure sequences using the system as claimed in claim 4 , wherein the ISP turbo code decoder uses codeword sequence outputs of the ISP turbo code encoder, wherein pre-permutation codeword sequence received from the ISP turbo code encoder, which comprises the sequence output of original sequence processed by the first convolutional code encoder, is processed in even-numbered APP decoding runs, and post-permutation codeword sequence received from the ISP turbo code encoder, which comprises the sequence output of original sequence processed by and in the order of the ISP interleaver and the second convolutional code encoder, and the sequence output of original sequence processed by the ISP interleaver, is processed in odd-numbered APP decoding runs,
whereby the sequence output of original sequence processed by the ISP interleaver is called a first codeword sequence, the sequence output of original sequence processed by and in the order of the ISP interleaver and a second convolutional code encoder is called a second codeword sequence, and the sequence output of original sequence processed by a first convolutional code encoder is called a third codeword sequence, the method comprising the following steps for odd-numbered APP decoding run and even-numbered APP decoding run: For the odd-numbered APP decoding run: step of first APP decoder input: calculating a first input of the APP decoder by combining a sequence of a priori probability measure and the first codeword sequence through an adder of a scheduler pool; step of second APP decoder input: inputting the second codeword sequence into the APP decoder as a second input; step of outputting first result: outputting a first result probability measure sequence by the APP decoder; step of generating first soft decoding output: calculating a first sequence of soft decoding output by eliminating the sequence of a priori probability measure from the first result probability measure sequence through a subtracter of the scheduler pool; step of first interchange: outputting the first sequence of soft decoding output as a sequence of a priori probability measure of the subsequent even-numbered APP decoding run, wherein the even-numbered APP decoding runs work on pre-permutation codeword sequences, such that de-permutation must be performed on the first sequence of soft decoding output before the first sequence of soft decoding output can be used in the subsequent even-numbered APP decoding run; For the even-numbered APP decoding run: step of third APP decoder input: receiving two inputs by an APP decoder wherein the inputs are the sequence of a priori probability measure in step of first interchange and the third codeword sequence, and outputting a second result probability measure sequence, wherein the APP decoder can be or not be the same as one used in the odd-numbered APP decoding run; step of outputting second result: calculating a second sequence of soft decoding output by eliminating the sequence of a priori probability measure in step of first interchange or step of third APP decoder input from the second result probability measure sequence through the subtracter of the scheduler pool, wherein the subtracter can be or not be the same as one used in the odd-numbered APP decoding run; step of second interchange: outputting the second sequence of soft decoding output as the sequence of a priori probability measure of the subsequent odd-numbered APP decoding run, wherein the odd-numbered APP decoding runs work on post-permutation codeword sequences, permutation must be performed on the second sequence of soft decoding output before the second sequence of soft decoding output can be used in the subsequent odd-numbered APP decoding run.
66 . The method as claimed in claim 64 , wherein the “permutation” performed in the step of first interchange is performed according to the ISP interleaver used in the ISP turbo code encoder, wherein the permutation can be performed in accordance with one of the following cases:
if a first ISP interleaver recited is used in encoder side, a first ISP turbo code decoder is employed, and the permutation is performed by and in the order of a first sequence permuter in the first sequence permuter pool, an ISP control unit in the ISP control unit pool which works with the memory pool, and a second sequence permuter in the second sequence permuter pool, in the process of the ISP interleaver; if a second ISP interleaver is used in encoder side, a second ISP turbo code decoder is employed, and the permutation is performed by and in the order of an ISP control unit working in the ISP control unit pool which works with the memory pool, and a second sequence permuter in the second sequence permuter pool, in the process of the ISP interleaver; if a third ISP interleaver is used in encoder side, a third ISP turbo code decoder is employed, and the permutation is performed by and in the order of a first sequence permuter in the first sequence permuter pool, and an ISP control unit in the ISP control unit pool which works with the memory pool, in the process of the ISP interleaver; and if a fourth ISP interleaver is used in encoder side, a fourth ISP turbo code decoder is employed, and the permutation is performed by an ISP control unit in the ISP control unit pool which works with the memory pool; wherein the first ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm, the inter-sequence permuter, and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the first ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, a first sequence de-permuter pool having at least one first sequence de-permuter, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the second ISP interleaver comprises the inter-sequence permuter and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the second ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the third ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm and the inter-sequence permuter; wherein the third ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, and a first sequence de-permuter pool having at least one first sequence de-permuter; wherein the fourth ISP interleaver comprises the inter-sequence permuter; wherein the fourth ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit.
67 . The method as claimed in claim 65 , wherein the “permutation” performed in the step of second interchange is performed according to the ISP interleaver used in the ISP turbo code encoder, wherein the permutation can be performed in accordance with one of the following cases:
if a first ISP interleaver is used in encoder side, a first ISP turbo code decoder is employed, and the permutation is performed by and in the order of a first sequence permuter in the first sequence permuter pool, an ISP control unit in the ISP control unit pool which works with the memory pool, and a second sequence permuter in the second sequence permuter pool, in the process of the ISP interleaver; if a second ISP interleaver is used in encoder side, a second ISP turbo code decoder is employed, and the permutation is performed by and in the order of an ISP control unit working in the ISP control unit pool which works with the memory pool, and a second sequence permuter in the second sequence permuter pool, in the process of the ISP interleaver; if a third ISP interleaver is used in encoder side, a third ISP turbo code decoder is employed, and the permutation is performed by and in the order of a first sequence permuter in the first sequence permuter pool, and an ISP control unit in the ISP control unit pool which works with the memory pool, in the process of the ISP interleaver; and if a fourth ISP interleaver is used in encoder side, a fourth ISP turbo code decoder is employed, and the permutation is performed by an ISP control unit in the ISP control unit pool which works with the memory pool; wherein the first ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm, the inter-sequence permuter, and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the first ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, a first sequence de-permuter pool having at least one first sequence de-permuter, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the second ISP interleaver comprises the inter-sequence permuter and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the second ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the third ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm and the inter-sequence permuter; wherein the third ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, and a first sequence de-permuter pool having at least one first sequence de-permuter; wherein the fourth ISP interleaver comprises the inter-sequence permuter; wherein the fourth ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit.
68 . The method as claimed in claim 64 , wherein the “de-permutation” performed in the step of second interchange is performed according to ISP interleaver used in the ISP turbo code encoder, wherein the de-permutation can be performed in accordance with one of the following cases:
if a first ISP interleaver is used in encoder side, a first ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of a second sequence de-permuter in the second sequence de-permuter pool, an ISDP control unit in the ISDP control unit pool which works with the memory pool, and a first sequence de-permuter in the first sequence de-permuter pool, in the reverse process of the ISP interleaver; if a second ISP interleaver is used in encoder side, a second ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of a second sequence de-permuter in the second sequence de-permuter pool, and an ISDP control unit in the ISDP control unit pool which works with the memory pool, in the reverse process of the ISP interleaver; if a third ISP interleaver is used in encoder side, a third ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of an ISDP control unit in the ISDP control unit pool which works with the memory pool, and a first sequence de-permuter in the first sequence de-permuter pool, in the reverse process of the ISP interleaver; and if a fourth ISP interleaver is used in encoder side, a fourth ISP turbo code decoder is employed, and the de-permutation is performed by an ISDP control unit in the ISDP control unit pool which works with the memory pool. wherein the first ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm, the inter-sequence permuter, and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the first ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, a first sequence de-permuter pool having at least one first sequence de-permuter, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the second ISP interleaver comprises the inter-sequence permuter and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the second ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the third ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm and the inter-sequence permuter; wherein the third ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, and a first sequence de-permuter pool having at least one first sequence de-permuter; wherein the fourth ISP interleaver comprises the inter-sequence permuter; wherein the fourth ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit.
69 . The method as claimed in claim 65 , wherein the “de-permutation” performed in the step of first interchange is performed according to ISP interleaver used in the ISP turbo code encoder, wherein the de-permutation can be performed in accordance with one of the following cases:
if a first ISP interleaver is used in encoder side, a first ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of a second sequence de-permuter in the second sequence de-permuter pool, an ISDP control unit in the ISDP control unit pool which works with the memory pool, and a first sequence de-permuter in the first sequence de-permuter pool, in the reverse process of the ISP interleaver; if a second ISP interleaver is used in encoder side, a second ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of a second sequence de-permuter in the second sequence de-permuter pool, and an ISDP control unit in the ISDP control unit pool which works with the memory pool, in the reverse process of the ISP interleaver; if a third ISP interleaver is used in encoder side, a third ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of an ISDP control unit in the ISDP control unit pool which works with the memory pool, and a first sequence de-permuter in the first sequence de-permuter pool, in the reverse process of the ISP interleaver; and if a fourth ISP interleaver is used in encoder side, a fourth ISP turbo code decoder is employed, and the de-permutation is performed by an ISDP control unit in the ISDP control unit pool which works with the memory pool. wherein the first ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm, the inter-sequence permuter, and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the first ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, a first sequence de-permuter pool having at least one first sequence de-permuter, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the second ISP interleaver comprises the inter-sequence permuter and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the second ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the third ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm and the inter-sequence permuter; wherein the third ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, and a first sequence de-permuter pool having at least one first sequence de-permuter; wherein the fourth ISP interleaver comprises the inter-sequence permuter; wherein the fourth ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit.
70 . The method as claimed in claim 64 , wherein the adder and subtracter can be replaced by a multiplier and a divider respectively in accordance with scale or format of the sequences.
71 . The method as claimed in claim 65 , wherein the adder and subtracter can be replaced by a multiplier and a divider respectively in accordance with scale or format of the sequences.
72 . The method as claimed in claim 64 , further comprising the following steps of scheduling:
step of initialization: initializing a scheduler in a scheduler pool to work on the i-th codeword sequence; going to step of APP decoding run; step of APP decoding run: performing an APP decoding run according to number thereof; going to step of checking maximum APP decoding run; step of checking maximum APP decoding run: checking if a prescribed maximum number of APP decoding run has been achieved; if achieved, going to step of first outputting; if not achieved, going to step of phasing; step of first outputting: outputting result of the i-th codeword sequence; step of stopping: stopping the scheduler; step of phasing: selecting a new value of i and corresponding number of APP decoding run; going to the step of APP decoding run.
73 . The method as claimed in claim 65 , further comprising the following steps of scheduling:
step of initialization: initializing a scheduler in a scheduler pool to work on the i-th codeword sequence; going to step of APP decoding run; step of APP decoding run: performing an APP decoding run according to number thereof; going to step of checking maximum APP decoding run; step of checking maximum APP decoding run: checking if a prescribed maximum number of APP decoding run has been achieved; if achieved, going to step of first outputting; if not achieved, going to step of phasing; step of first outputting: outputting result of the i-th codeword sequence; step of stopping: stopping the scheduler; step of phasing: selecting a new value of i and corresponding number of APP decoding run; going to the step of APP decoding run.
74 . The method as claimed in claim 72 , further comprising the following steps:
step of first necessity check, which is between the step of initialization and the step of APP decoding run: according to a decoder index table, checking if an APP decoding run to be occurred is required; if required, going to the step of APP decoding run; if not required, going to the step of checking maximum APP decoding run; if the step of first necessity check exists, then the step of phasing is directed to the step of first necessity check directly instead of the step of APP decoding run; step of first decision making, which is between the step of outputting first result and the step of generating first soft decoding output further: inputting the first result probability measure sequence into a decision maker of the scheduler pool and outputting a first hard decoding output; step of termination test, which is between the step of APP decoding run and the step of checking maximum APP decoding run: performing a termination test, which could be a conventional CRC test, to check if the first hard decoding output passes the test; if the test is passed, then going to a step of updating; if the test is not passed or the APP decoding run just performed does not have the hard decoding output, then going to the step of checking maximum APP decoding run; step of updating: updating a decoder index table corresponding to the pre-permutation codeword sequence according to result of the first termination test; then going to the step of checking maximum APP decoding run.
75 . The method as claimed in claim 73 , further comprising the following steps:
step of first necessity check, which is between the step of initialization and the step of APP decoding run: according to a decoder index table, checking if an APP decoding run to be occurred is required; if required, going to the step of APP decoding run; if not required, going to the step of checking maximum APP decoding run; if the step of first necessity check exists, then the step of phasing is directed to the step of first necessity check directly instead of the step of APP decoding run; step of first decision making, which is between the step of outputting first result and the step of generating first soft decoding output further: inputting the first result probability measure sequence into a decision maker of the scheduler pool and outputting a first hard decoding output; the first hard decoding output should be performed de-permutation to generate a de-permuted first hard decoding output; step of termination test, which is between the step of APP decoding run and the step of checking maximum APP decoding run: performing a termination test, which could be a conventional CRC test, to check if the de-permuted first hard decoding output passes the test; if the test is passed, then going to a step of updating; if the test is not passed or the APP decoding run just performed does not have the de-permuted hard decoding output, then going to the step of checking maximum APP decoding run; step of updating: updating a decoder index table corresponding to the pre-permutation codeword sequence according to result of the first termination test; then going to the step of checking maximum APP decoding run.
76 . The method as claimed in claim 74 , further comprising the following steps:
step of post-termination test, which exists between the step of updating and the step of checking maximum APP decoding run: performing a post-termination test to check with the decoder index table if the post-permutation codeword sequence is required for successive APP decoding; a result of the test is used to update the decoder index table corresponding to the post-permutation codeword sequence or to release unnecessary post-permutation codeword sequence in the memory pool; if the step of post-termination test exists, then directing “not required” output of the step of first necessity check and output of the step of updating to the step of post-termination test.
77 . The method as claimed in claim 75 , further comprising the following steps:
step of post-termination test, which exists between the step of updating and the step of checking maximum APP decoding run: performing a post-termination test to check with the decoder index table if the post-permutation codeword sequence is required for successive APP decoding; a result of the test is used to update the decoder index table corresponding to the post-permutation codeword sequence or to release unnecessary post-permutation codeword sequence in the memory pool; if the step of post-termination test exists, then directing “not required” output of the step of first necessity check and output of the step of updating to the step of post-termination test.
78 . The method as claimed in claim 74 , further comprising the following step:
in the step of termination test, if the first hard decoding output from the decision maker passes the test, then outputting or calibrating the sequence of soft decoding output by using the first hard decoding output, or releasing unnecessary pre-permutation codeword sequence in the memory pool.
79 . The method as claimed in claim 75 , further comprising the following step:
in the step of termination test, if the de-permuted first hard decoding output from the decision maker passes the test, then outputting or calibrating the sequence of soft decoding output by using the de-permuted first hard decoding output, or releasing unnecessary pre-permutation codeword sequence in the memory pool.
80 . The method as claimed in claim 72 , further comprising the following steps:
step of first necessity check, which exists between the step of initialization and the step of APP decoding run: according to a decoder index table, checking if an APP decoding run to be occurred is required; if required, going to the step of APP decoding run; if not required, going to the step of checking maximum APP decoding run; if the step of first necessity check exists, then going to the step of first necessity check directly instead of the step of APP decoding run after the step of phasing; step of second decision making, which exists between the step of third APP decoder input and the step of outputting second result: inputting the second result probability measure sequence to a decision maker of the scheduler pool and outputting a second hard decoding output; the second hard decoding output is performed de-permutation to generate a de-permuted second hard decoding output; step of termination test, which exists between the step of APP decoding run and the step of checking maximum APP decoding run: performing a termination test, which could be a conventional CRC test, to check if the de-permuted second hard decoding output passes the test; if the test is passed, then going to a step of updating; if the test is not passed or the APP decoding run just performed does not have the de-permuted second hard decoding output, then going to the step of checking maximum APP decoding run; step of updating: updating the decoder index table corresponding to the pre-permutation codeword sequence according to results of the termination test; then going to the step of checking maximum APP decoding run.
81 . The method as claimed in claim 73 , further comprising the following steps:
step of first necessity check, which exists between the step of initialization and the step of APP decoding run: according to a decoder index table, checking if an APP decoding run to be occurred is required; if required, going to the step of APP decoding run; if not required, going to the step of checking maximum APP decoding run; if the step of first necessity check exists, then going to the step of first necessity check directly instead of the step of APP decoding run after the step of phasing; step of second decision making, which exists between the step of third APP decoder input and the step of outputting second result: inputting the second result probability measure sequence to a decision maker of the scheduler pool and outputting a second hard decoding output; step of termination test, which exists between the step of APP decoding run and the step of checking maximum APP decoding run: performing a termination test, which could be a conventional CRC test, to check if the second hard decoding output passes the test; if the test is passed, then going to a step of updating; if the test is not passed or the APP decoding run just performed does not have the second hard decoding output, then going to the step of checking maximum APP decoding run; step of updating: updating the decoder index table corresponding to the pre-permutation codeword sequence according to results of the termination test; then going to the step of checking maximum APP decoding run.
82 . The method as claimed in claim 80 , further comprising the following steps:
step of post-termination test, which exists between the step of updating and the step of checking maximum APP decoding run: performing a post-termination test to check with the decoder index table if the post-permutation codeword sequence is required for successive APP decoding; result of the test is used to update the decoder index table corresponding to the post-permutation codeword sequence or to release unnecessary post-permutation codeword sequence in the memory pool; if the step of post-termination test exists, then directing “not required” output of the step of first necessity check and output of the step of updating to the step of post-termination test.
83 . The method as claimed in claim 81 , further comprising the following steps:
step of post-termination test, which exists between the step of updating and the step of checking maximum APP decoding run: performing a post-termination test to check with the decoder index table if the post-permutation codeword sequence is required for successive APP decoding; result of the test is used to update the decoder index table corresponding to the post-permutation codeword sequence or to release unnecessary post-permutation codeword sequence in the memory pool; if the step of post-termination test exists, then directing “not required” output of the step of first necessity check and output of the step of updating to the step of post-termination test.
84 . The method as claimed in claim 80 , further comprising the following step:
in the step of termination test, if the de-permuted second hard decoding output corresponding to the pre-permutation codeword sequence from the decision maker passes the test, then outputting or directing the sequence of soft decoding output by using the de-permuted second hard decoding output, or releasing unnecessary pre-permutation codeword sequence in the memory pool.
85 . The method as claimed in claim 81 , further comprising the following step:
in the step of termination test, if the second hard decoding output corresponding to the pre-permutation codeword sequence from the decision maker passes the test, then outputting or directing the sequence of soft decoding output by using the second hard decoding output, or releasing unnecessary pre-permutation codeword sequence from the memory pool.
86 . The method as claimed in claim 75 , wherein the “de-permutation” performed in step of first decision making is performed according to ISP interleaver used in the ISP turbo code encoder; the de-permutation can be performed in accordance with one of the following cases:
if a first ISP interleaver is used in encoder side, a first ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of a second sequence de-permuter in the second sequence de-permuter pool, an ISDP control unit in the ISDP control unit pool which works with the memory pool, and a first sequence de-permuter in the first sequence de-permuter pool, in the reverse process of the ISP interleaver; if a second ISP interleaver is used in encoder side, a second ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of a second sequence de-permuter in the second sequence de-permuter pool, and an ISDP control unit in the ISDP control unit pool which works with the memory pool, in the reverse process of the ISP interleaver; if a third ISP interleaver is used in encoder side, a third ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of an ISDP control unit in the ISDP control unit pool which works with the memory pool, and a first sequence de-permuter in the first sequence de-permuter pool, in the reverse process of the ISP interleaver; and if a fourth ISP interleaver is used in encoder side, a fourth ISP turbo code decoder is employed, and the de-permutation is performed by an ISDP control unit in the ISDP control unit pool which works with the memory pool. wherein the first ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm, the inter-sequence permuter, and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the first ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, a first sequence de-permuter pool having at least one first sequence de-permuter, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the second ISP interleaver comprises the inter-sequence permuter and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the second ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the third ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm and the inter-sequence permuter; wherein the third ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, and a first sequence de-permuter pool having at least one first sequence de-permuter; wherein the fourth ISP interleaver comprises the inter-sequence permuter; wherein the fourth ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit.
87 . The method as claimed in claim 80 , wherein the “de-permutation” performed in step of second decision making is performed according to ISP interleaver used in the ISP turbo code encoder; the de-permutation can be performed in accordance with one of the following cases:
if a first ISP interleaver is used in encoder side, a first ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of a second sequence de-permuter in the second sequence de-permuter pool, an ISDP control unit in the ISDP control unit pool which works with the memory pool, and a first sequence de-permuter in the first sequence de-permuter pool, in the reverse process of the ISP interleaver; if a second ISP interleaver is used in encoder side, a second ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of a second sequence de-permuter in the second sequence de-permuter pool, and an ISDP control unit in the ISDP control unit pool which works with the memory pool, in the reverse process of the ISP interleaver; if a third ISP interleaver is used in encoder side, a third ISP turbo code decoder is employed, and the de-permutation is performed by and in the order of an ISDP control unit in the ISDP control unit pool which works with the memory pool, and a first sequence de-permuter in the first sequence de-permuter pool, in the reverse process of the ISP interleaver; and if a fourth ISP interleaver is used in encoder side, a fourth ISP turbo code decoder is employed, and the de-permutation is performed by an ISDP control unit in the ISDP control unit pool which works with the memory pool, wherein the first ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm, the inter-sequence permuter, and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the first ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, a first sequence de-permuter pool having at least one first sequence de-permuter, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the second ISP interleaver comprises the inter-sequence permuter and a second sequence permuter utilizing a conventional sequence permuting algorithm; wherein the second ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a second sequence permuter pool having at least one second sequence permuter, and a second sequence de-permuter pool having at least one second sequence de-permuter; wherein the third ISP interleaver comprises a first sequence permuter utilizing a conventional sequence permuting algorithm and the inter-sequence permuter; wherein the third ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table for storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit, a first sequence permuter pool having at least one first sequence permuter, and a first sequence de-permuter pool having at least one first sequence de-permuter; wherein the fourth ISP interleaver comprises the inter-sequence permuter; wherein the fourth ISP turbo code decoder comprises an APP decoder pool having at least one APP decoder, a scheduler pool having at least one scheduler, a memory pool having a plurality of memory units for storing sequences, a memory index table storing information on relationship between the memory units and received sequences, an ISP control unit pool having at least one ISP control unit, an inter-sequence de-permutation (ISDP) control unit pool having at least one ISDP control unit.Join the waitlist — get patent alerts
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