Clock generator, radio receiver using the same, function system, and sensing system
Abstract
A clock generator having phase locked loops to receive reference signals from a shared reference signal source and generate clock signals differing in frequency, respectively, includes a phase comparator which generates a voltage signal in response to a phase difference between a phase of the reference signal and a phase of a feedback signal, a VCO controlled by a voltage signal from the phase comparator, and a frequency divider group connected in cascade in a feedback loop between an output of the VCO and an input of a feedback signal, and takes out a clock signals from each output of the frequency divider group.
Claims
exact text as granted — not AI-modified1 . A clock generator comprising:
a plurality of phase locked loops, each receiving reference signals from a shared reference signal source to generate a plurality of clock signals differing in frequency, respectively; each of the phase locked loops including:
a phase comparator which compares a phase of the reference signal with a phase of a feedback signal to generate a voltage signal in response to a phase difference between the reference signal and the feedback signal;
a voltage controlled oscillator of which the output signal is controlled in frequency by a voltage signal;
a feedback loop disposed between an output of the voltage controlled oscillator and an input of the feedback signal of the phase comparator;
a first frequency divider which is connected to the voltage controlled oscillator in the feedback loop to output a first clock signal;
a second frequency divider which is connected to the first frequency divider to output a second clock signal;
a first output terminal which takes out the first clock signal; and
a second output terminal which takes out the second clock signal.
2 . The clock generator according to claim 1 , wherein each of the phase locked loops further including:
at least one of frequency dividers which are connected in cascade to the second frequency divider in the feedback loop to output a clock signals, respectively; and at least one of output terminals which output the clock signals, respectively.
3 . A radio receiver comprising:
a plurality of receiving units; each of the receiving units including:
an antenna which receives a high-frequency signal to generate an analog reception signal;
an RF unit which down-converts the analog reception signal to generate a base band signal;
an analog-to-digital converter which converts the base band signal into a digital signal;
a decimation unit which decimates the digital signal to generate a digital signal for demodulation;
a digital signal processing unit which performs digital signal processing to the digital signal for the demodulation to reproduce data; and
the clock generator according to claim 1 , which supplies clock signals differing in frequency to the analog-to-digital converter and the decimation unit, respectively.
4 . A function system comprising:
a plurality of function units; each of the function units including:
an analog-to-digital converter which converts an analog signal into a digital signal;
a decimation unit which decimate the digital signal to generate a digital signal for demodulation;
a digital signal processing unit which performs digital processing to the digital signal for the demodulation to reproduce data; and
the clock generator according to claim 1 , which supplies clock signals differing in frequency to the analog-to-digital converter and the decimation unit, respectively.
5 . A sensing system comprising:
a plurality of sensor units; each of the sensor units including:
a sensor which senses physical quantity to output it as an analog signal;
an analog-to-digital converter which converts the analog signal into a digital signal;
a decimation unit which decimates the digital signal to generate a digital signal for demodulation;
a digital signal processing unit which performs digital processing to the digital signal for the demodulation to reproduce data; and
the clock generator according to claim 1 , which supplies clock signals differing in frequency to the analog-to-digital converter and the decimation unit, respectively.
6 . The sensing system according to claim 5 , wherein the physical quantity is at least one of an image, a sound, a temperature, a pressure or humidity.
7 . A clock generator comprising:
a plurality of phase locked loops each receiving reference signals from a shared reference signal source to generate output signals synchronized with the reference signals, respectively; a plurality of frequency divider groups each of which are connected in cascade with each output of the phase locked loops and can reset initial states of the frequency divider groups; and a plurality of output terminals each of which take out clock signals differing in frequency from each of the plurality of frequency divider groups, respectively.
8 . The clock generator according to claim 7 , wherein each of the phase locked loops including:
a phase comparator which compares phase of the reference signal with a phase of a feedback signal to generate a voltage signal in response to a phase difference between the reference signal and the feedback signal; a voltage controlled oscillator of which the output signal is controlled in frequency by a voltage signal; a output terminal which takes out output signal from the voltage controlled oscillator; a feedback loop disposed between an output of the voltage controlled oscillator and an input of the feedback signal of the phase comparator; and a frequency divider which is connected to the voltage controlled oscillator in the feedback loop.
9 . A radio receiver comprising:
a plurality of receiving unit; each of the receiving unit including:
an antenna which receives a high-frequency signal to generate an analog reception signal;
an RF unit which down-converts the analog reception signal to generate a base band signal;
an analog-to-digital converter which converts the base band signal into a digital signal;
a decimation unit which decimates the digital signal to generate a digital signal for demodulation;
a digital signal processing unit which performs digital signal processing to the digital signal for the demodulation to reproduce data; and
the clock generator according to claim 7 , which supplies clock signals differing in frequency to the analog-to-digital converter and the decimation unit, respectively.
10 . A function system comprising:
a plurality of function units; each of the function units including:
an analog-to-digital converter which converts an analog signal into a digital signal; and
a decimation unit which decimate the digital signal to generate a digital signal for demodulation;
a digital signal processing unit which performs digital processing to the digital signal for the demodulation to reproduce data; and
the clock generator according to claim 7 , which supplies clock signals differing in frequency to the analog-to-digital converter and a decimation unit, respectively.
11 . A sensing system comprising:
a plurality of sensor units; each of the sensor units including:
a sensor which senses physical quantity to output it as an analog signal;
an analog-to-digital converter which converts the analog signal into a digital signal;
a decimation unit which decimates the digital signal to generate a digital signal for demodulation; and
a digital signal processing unit which performs digital processing to the digital signal for the demodulation to reproduce data; and
the clock generator according to claim 7 , which supplies clock signals differing in frequency to the analog-to-digital converter and a decimation unit, respectively.
12 . The sensing system according to claim 11 , wherein the physical quantity is at least one of an image, a sound, a temperature, a pressure or humidity.Join the waitlist — get patent alerts
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