Apparatus for authenticating the validity of a device

Abstract

An apparatus is provided for validating the authenticity of a device. The apparatus comprises a first integrated circuit which: stores a secret key, is configured to generate a random number, and is configured to generate reference information using the generated random number and the secret key. A control system: is configured to receive the reference information from the first integrated circuit, is configured to receive authenticity information from a second integrated circuit positioned on the device whereby the authenticity information is generated by the second integrated circuit using the generated random number and the secret key, and is configured to compare the reference and authenticity information received from the integrated circuits to validate the authenticity of the device.

1 . An apparatus for validating the authenticity of a device, the apparatus comprising: 
 a first integrated circuit which stores a secret key, is configured to generate a random number, and is configured to generate reference information using the generated random number and the secret key; and    a control system which is configured to receive the reference information from the first integrated circuit, is configured to receive authenticity information from a second integrated circuit positioned on the device whereby the authenticity information is generated by the second integrated circuit using the generated random number and the secret key, and is configured to compare the reference and authenticity information received from the integrated circuits to validate the authenticity of the device.    
     
     
         2 . An apparatus as claimed in  claim 1 , wherein the first integrated circuit is configured to generate the reference information as a function of the generated random number and the secret key.  
     
     
         3 . An apparatus as claimed in  claim 2 , wherein said function is a one-way function.  
     
     
         4 . An apparatus as claimed in  claim 1 , wherein the first integrated circuit is configured to generate a vector of random numbers and is configured select the next sequential random number in the vector with each successive authentication attempt.  
     
     
         5 . An apparatus as claimed in  claim 4 , wherein the first integrated circuit comprises a linear feedback shift register which generates the random number vector.  
     
     
         6 . An apparatus as claimed in  claim 1 , wherein the control system is configured to validate the authenticity of the device if said reference and authenticity information are of equal value.  
     
     
         7 . An apparatus as claimed in  claim 1 , wherein the authenticity information is generated as a function of the generated random number and the secret key.  
     
     
         8 . An apparatus as claimed in  claim 7 , wherein said function is a one-way function.